BUG=none
TEST=none

Review URL: http://codereview.chromium.org/6346009

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ARM: The Simulator will now handle different VFP rounding modes. RZ and RM are implemented.  This is a commit of 
http://codereview.chromium.org/4295003/show for Alexander Rames of ARM.

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Fix the ARM simulator, the ARM disassembler and extend the stop feature. 
The stop feature in the simulator now support enabling, disabling and 
counting. 

BUG=None 
TEST=None 

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Fix incorrect encoding of single and double precision registers for some VFP instructions. Also fix incorrect disassembling of vldr/vstr.  This is a commit of http://codereview.chromium.org/3107027 for Rodolph Perfetta.

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between single VFP registers.  Math.pow implementation has
been updated with the new instructions.  This is a commit
of http://codereview.chromium.org/2813046/show for Rodolph
Perfetta.


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Zhang Kun.  For now we only emit movw and movt in places where no
relocation is needed.  Small performance boost (around 0.5%).
Also adds support for turning ALU operations (eor etc.) with
large immediates into mvn or movw followed by a register-based
ALU operation.
Review URL: http://codereview.chromium.org/2821014

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Support building with or without unaligned accesses by using scons flag simulatorunalignedaccesses.

$ scons simulator=arm simulatorunalignedaccesses=off
$ scons simulator=arm simulatorunalignedaccesses=on

If simulatorunalignedaccesses is not specified (or specified as default) the default is to use unaligned accesses.
Review URL: http://codereview.chromium.org/2218003

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The build process must add -DCAN_USE_UNALIGNED_ACCESSES=1 to the
C++ flags to activate the support.  This is a commit for
Subrato of CodeAurora.  See http://codereview.chromium.org/1731013
Small edits by Erik Corry to activate unaligned accesses by
default on the simulator and testing Android builds.


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The bkpt instruction is now supported by both the disassembler and the simulator. In the simulator it breaks to the native debugger if any like int3 on Intel.

Moved the handling of the miscellaneous instructions to a separate part.

Review URL: http://codereview.chromium.org/1576026


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Review URL: http://codereview.chromium.org/993002

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available. Using blx will allow the CPU to predict the return address
fo the function, resulting in better overall performamce.
This is a copy of http://codereview.chromium.org/1113002 by
rodolph.perfetta@googlemail.com

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Review URL: http://codereview.chromium.org/545155

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used by gcc to indicate ARM architectures.
Review URL: http://codereview.chromium.org/440017

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indicates ARMv6.
Review URL: http://codereview.chromium.org/437056

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Also move a function into the macro assembler.
Fix some *& placement errors that had accumulated.
Review URL: http://codereview.chromium.org/385069

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Review URL: http://codereview.chromium.org/348019

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Ensure that we use ARMv5 instructions on ARMv6 and ARMv7 CPUs.
Review URL: http://codereview.chromium.org/206012

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Review URL: http://codereview.chromium.org/195024

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Review URL: http://codereview.chromium.org/150100

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instructions.  The intention is that the snapshots generated
by the simulator should be usable on the hardware.  Instead of
swi instructions we generate a branch to a swi instruction that
is not part of the snapshot.  The call/jump is patched up in
the same way as other external references when the snapshot
is deserialized.  This only works for EABI targets: on old ABI
targets we still emit some instructions not supported by the
simulator (fp coprocessor instructions).
Review URL: http://codereview.chromium.org/119036

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This issue was raised by Brett Wilson while reviewing my changelist for readability. Craig Silverstein (one of C++ SG maintainers) confirmed that we should declare one namespace per line. Our way of namespaces closing seems not violating style guides (there is no clear agreement on it), so I left it intact.

Review URL: http://codereview.chromium.org/115756


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- Fix some typos / guards that didn't match the filename.
- Fix some style inconsistencies.
- Add guards to files that were missing them.
- Add the directory name to the guard.

Review URL: http://codereview.chromium.org/99343


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Move ia32 and arm specific files to subdirectories to make it easier to add more backends.

Review URL: http://codereview.chromium.org/92068


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(at the moment only if we do not need to allocate a heap number).
Find a few more oportunities to avoid heap number allocation on IA32.
Add some infrastructure to test coverage of generated ARM code in our
tests.
Review URL: http://codereview.chromium.org/67163

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Review URL: http://codereview.chromium.org/12427

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Review URL: http://codereview.chromium.org/8939

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Added presubmit step to check copyright.



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