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  1. 07 Aug, 2018 1 commit
  3. 03 Aug, 2018 1 commit
  5. 09 Jul, 2018 1 commit
    • Sigurd Schneider's avatar
      [turbofan] Use relative calls/jumps on arm for builtins · 23dbb81d
      Sigurd Schneider authored 
      This CL uses pc-relative jumps and calls (B/BL) for calls from embedded
builtins to embedded builtins. To make this work, the code range size is
limited to 32MB on arm during mksnapshot, which ensures that all builtin
to builtin offsets for jumps/calls fit into the B/BL immediate. At code
generation time, we put a placeholder into the instruction offset which
we resolve to the right code object when the code is copied to the heap.
We use a new relocation mode RELATIVE_CODE_TARGET for these relative jumps.
The relocation mode RELATIVE_CODE_TARGET should never appear after
generating the snapshot.

We modify the target_address/set_target_address methods of RelocInfo
such that they return the absolute target addresses for pc-relative B/BL
instructions. This ensures that the GC can treat RELATIVE_CODE_TARGET in
the same way as code targets. This, however, only matters during
snapshot creation time, and production code never contains
RELATIVE_CODE_TARGET relocations.

Bug: v8:6666
Cq-Include-Trybots: luci.chromium.try:linux_chromium_rel_ng
Change-Id: If7eab83ad588859ca87c654a5ddc3e37caea884c
Reviewed-on: https://chromium-review.googlesource.com/1117181Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
Reviewed-by: 's avatarUlan Degenbaev <ulan@chromium.org>
Reviewed-by: 's avatarJakob Gruber <jgruber@chromium.org>
Commit-Queue: Sigurd Schneider <sigurds@chromium.org>
Cr-Commit-Position: refs/heads/master@{#54320}
      23dbb81d
  7. 26 Jun, 2018 1 commit
    • Sigurd Schneider's avatar
      [turbofan] Support kRootRegisterBias on all platforms · ba39d635
      Sigurd Schneider authored 
      We had a kRootRegisterBias on x64 before. This CL ports the feature to
all other platforms as well. The root register bias is helpful to adjust
the value of the root register, which allows to better utilize signed
immediate offset constants in load instructions.

We currently use a separate add instruction to add kRootRegisterBias
in the code that initializes the root register. This could be improved
by adding a custom relocation mode ensuring that instead of the root
address, the root address plus the bias is inserted (and in this way
the add instruction can be omitted).

Bug: v8:6666
Change-Id: I55cf02ab85d11e3c6d0d83a8f7905dbf924890f1
Reviewed-on: https://chromium-review.googlesource.com/1113539
Commit-Queue: Sigurd Schneider <sigurds@chromium.org>
Reviewed-by: 's avatarJakob Gruber <jgruber@chromium.org>
Cr-Commit-Position: refs/heads/master@{#54023}
      ba39d635
  9. 05 Apr, 2018 1 commit
  11. 29 Jun, 2017 1 commit
  13. 30 Mar, 2017 1 commit
  15. 29 Mar, 2017 1 commit
  17. 23 Mar, 2017 1 commit
  19. 24 Feb, 2017 1 commit
  21. 13 Jan, 2017 1 commit
  23. 12 Jan, 2017 1 commit
  25. 18 Aug, 2016 1 commit
  27. 09 Dec, 2015 1 commit
    • mbrandy's avatar
      PPC64: [turbofan] Changed TruncateFloat64ToInt64 to TryTruncateFloat64ToInt64. · b9f92c15
      mbrandy authored 
      Port 95844d94

Original commit message:
    The new operator provides a second output which indicates whether the
    conversion from float64 to int64 was successful or not. The second
    output returns 0 if the conversion fails. If the conversion succeeds,
    then the second output is differs from 0.

    The second output can be ignored, which means that the operator can be
    used the same way as the original operator.

R=ahaas@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1515603002

Cr-Commit-Position: refs/heads/master@{#32724}
      b9f92c15
  29. 23 Nov, 2015 1 commit
  31. 11 Nov, 2015 1 commit
  33. 10 Nov, 2015 1 commit
  35. 16 Oct, 2015 1 commit
  37. 05 Oct, 2015 1 commit
    • mbrandy's avatar
      PPC: Remove register index/code indirection · f53fda63
      mbrandy authored 
      Port 5cf1c0bc

Original commit message:
    Previous to this patch, both the lithium and TurboFan register
    allocators tracked allocated registers by "indices", rather than
    the register codes used elsewhere in the runtime. This patch
    ensures that codes are used everywhere, and in the process cleans
    up a bunch of redundant code and adds more structure to how the
    set of allocatable registers is defined.

    Some highlights of changes:

    * TurboFan's RegisterConfiguration class moved to V8's top level
      so that it can be shared with Crankshaft.
    * Various "ToAllocationIndex" and related methods removed.
    * Code that can be easily shared between Register classes on
      different platforms is now shared.
    * The list of allocatable registers on each platform is declared
      as a list rather than implicitly via the register index <->
      code mapping.

R=danno@chromium.org, bmeurer@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, dstence@us.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1381383002

Cr-Commit-Position: refs/heads/master@{#31114}
      f53fda63
  39. 30 Sep, 2015 1 commit
  41. 17 Aug, 2015 1 commit
  43. 02 Jul, 2015 1 commit
  45. 04 Jun, 2015 1 commit
    • mbrandy's avatar
      Add support for Embedded Constant Pools for PPC and Arm · eac7f046
      mbrandy authored 
      Embed constant pools within their corresponding Code
objects.

This removes support for out-of-line constant pools in favor
of the new approach -- the main advantage being that it
eliminates the need to allocate and manage separate constant
pool array objects.

Currently supported on PPC and ARM.  Enabled by default on
PPC only.

This yields a 6% improvment in Octane on PPC64.

R=bmeurer@chromium.org, rmcilroy@chromium.org, michael_dawson@ca.ibm.com
BUG=chromium:478811
LOG=Y

Review URL: https://codereview.chromium.org/1162993006

Cr-Commit-Position: refs/heads/master@{#28801}
      eac7f046
  47. 03 Jun, 2015 1 commit
  49. 02 Jun, 2015 1 commit
    • mbrandy's avatar
      Add support for Embedded Constant Pools for PPC and Arm · a9404029
      mbrandy authored 
      Embed constant pools within their corresponding Code
objects.

This removes support for out-of-line constant pools in favor
of the new approach -- the main advantage being that it
eliminates the need to allocate and manage separate constant
pool array objects.

Currently supported on PPC and ARM.  Enabled by default on
PPC only.

This yields a 6% improvment in Octane on PPC64.

R=danno@chromium.org, svenpanne@chromium.org, bmeurer@chromium.org, rmcilroy@chromium.org, dstence@us.ibm.com, michael_dawson@ca.ibm.com
BUG=chromium:478811
LOG=Y

Review URL: https://codereview.chromium.org/1131783003

Cr-Commit-Position: refs/heads/master@{#28770}
      a9404029
  51. 05 Feb, 2015 1 commit
    • michael_dawson's avatar
      Contribution of PowerPC port (continuation of 422063005) - PPC dir update · 308d913a
      michael_dawson authored 
      Contribution of PowerPC port (continuation of 422063005, 817143002 and 866843003)
This patch brings the ppc directories up to date with our repo. We have
removed 5 individual optimizations which require changes in both the ppc and common
directories so they can be more easily reviewed on their own in subsequent patches.

Subsequent patches will cover:
- individual optimizations for PPC (5)
- remaining AIX changes not resolved by 4.8 compiler (4.8 is only recently available
for AIX)
- incremental updates required to ppc directories due to platform specific changes
made in google repos while we complete the above steps.

With the update there are still some timeouts seen when run in simulated mode which
may be a result of the missing optimizations.  Once we have the optimizations in
we will review the simulation results and address/exclude tests as necessary so that
the simulated runs are clean.

	new file:   src/compiler/ppc/code-generator-ppc.cc
	new file:   src/compiler/ppc/instruction-codes-ppc.h
	new file:   src/compiler/ppc/instruction-selector-ppc.cc
	new file:   src/compiler/ppc/linkage-ppc.cc
	modified:   src/ic/ppc/handler-compiler-ppc.cc
	modified:   src/ic/ppc/ic-compiler-ppc.cc
	modified:   src/ic/ppc/ic-ppc.cc
	modified:   src/ic/ppc/stub-cache-ppc.cc
	modified:   src/ppc/assembler-ppc.cc
	modified:   src/ppc/assembler-ppc.h
	modified:   src/ppc/builtins-ppc.cc
	modified:   src/ppc/code-stubs-ppc.cc
	modified:   src/ppc/code-stubs-ppc.h
	modified:   src/ppc/codegen-ppc.cc
	modified:   src/ppc/constants-ppc.h
	modified:   src/ppc/deoptimizer-ppc.cc
	modified:   src/ppc/disasm-ppc.cc
	modified:   src/ppc/full-codegen-ppc.cc
	modified:   src/ppc/interface-descriptors-ppc.cc
	modified:   src/ppc/lithium-codegen-ppc.cc
	modified:   src/ppc/lithium-codegen-ppc.h
	modified:   src/ppc/lithium-ppc.cc
	modified:   src/ppc/lithium-ppc.h
	modified:   src/ppc/macro-assembler-ppc.cc
	modified:   src/ppc/macro-assembler-ppc.h
	modified:   src/ppc/regexp-macro-assembler-ppc.cc
	modified:   src/ppc/regexp-macro-assembler-ppc.h
	modified:   src/ppc/simulator-ppc.cc
	modified:   src/ppc/simulator-ppc.h
	new file:   test/unittests/compiler/ppc/instruction-selector-ppc-unittest.cc

R=danno@chromium.org, svenpanne@chromium.org

BUG=

Review URL: https://codereview.chromium.org/901083004

Cr-Commit-Position: refs/heads/master@{#26471}
      308d913a
  53. 11 Nov, 2014 1 commit