- 28 Nov, 2018 1 commit
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George Wort authored
This allows f32 floor, ceil, trunc, and nearest_int to use a C fallback in Liftoff in the same way that f64 rounding can. Bug: v8:6600 Change-Id: I8b88d806633bcfe2d2dfac9defaf60e551bf21b1 Reviewed-on: https://chromium-review.googlesource.com/c/1353898 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#57909}
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- 26 Nov, 2018 1 commit
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George Wort authored
This implements copy sign for both the arm32 and arm64 port of Liftoff. Bug: v8:6600 Change-Id: Ic822e75417c6b911a03e8e9a2d6d59a98fbc3d18 Reviewed-on: https://chromium-review.googlesource.com/c/1348430 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#57843}
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- 14 Sep, 2018 1 commit
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Clemens Hammacher authored
This implements the five sign extension opcodes for ia32 and x64 (and bails out on other architectures). R=titzer@chromium.org Bug: v8:6600 Change-Id: Ibb8bae0e229e276b346f2d054b51864a0995a096 Reviewed-on: https://chromium-review.googlesource.com/1174533 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Ben Titzer <titzer@chromium.org> Cr-Commit-Position: refs/heads/master@{#55898}
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- 12 Sep, 2018 3 commits
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Clemens Hammacher authored
This is a reland of 6afe7d18. The reason for the revert is fixed in https://crrev.com/c/1219633. Original change's description: > [Liftoff] Implement f32.copysign and f64.copysign > > These are two of the few missing instructions. This CL implements them > for ia32 and x64, and bails out on other platforms. > On x64, we are using the BTR instruction since we cannot have 64-bit > immediates. > > Drive-by: Fix naming of existing bt/bts instructions on x64. > > R=titzer@chromium.org > > Bug: v8:6600 > Change-Id: Ib8532ca811160cd61f4ba7c06b04ce093861c872 > Reviewed-on: https://chromium-review.googlesource.com/1174383 > Commit-Queue: Clemens Hammacher <clemensh@chromium.org> > Reviewed-by: Ben Titzer <titzer@chromium.org> > Cr-Commit-Position: refs/heads/master@{#55780} Bug: v8:6600 Change-Id: Ie14ba3a14848ba8e67f97e66d3379178f35dea40 TBR=titzer@chromium.org Change-Id: Ie14ba3a14848ba8e67f97e66d3379178f35dea40 Reviewed-on: https://chromium-review.googlesource.com/1219693Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#55817}
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Clemens Hammacher authored
This reverts commit f0f5f877. Reason for revert: Merge conflict (does not compile). Original change's description: > Reland "[Liftoff] Implement f32.copysign and f64.copysign" > > This is a reland of 6afe7d18. > The reason for the revert is fixed in https://crrev.com/c/1219633. > > Original change's description: > > [Liftoff] Implement f32.copysign and f64.copysign > > > > These are two of the few missing instructions. This CL implements them > > for ia32 and x64, and bails out on other platforms. > > On x64, we are using the BTR instruction since we cannot have 64-bit > > immediates. > > > > Drive-by: Fix naming of existing bt/bts instructions on x64. > > > > R=titzer@chromium.org > > > > Bug: v8:6600 > > Change-Id: Ib8532ca811160cd61f4ba7c06b04ce093861c872 > > Reviewed-on: https://chromium-review.googlesource.com/1174383 > > Commit-Queue: Clemens Hammacher <clemensh@chromium.org> > > Reviewed-by: Ben Titzer <titzer@chromium.org> > > Cr-Commit-Position: refs/heads/master@{#55780} > > Bug: v8:6600 > Change-Id: I4baeec6b02b17450988cfa7fedd5037f9cfe1638 > Reviewed-on: https://chromium-review.googlesource.com/1219508 > Reviewed-by: Ben Titzer <titzer@chromium.org> > Commit-Queue: Clemens Hammacher <clemensh@chromium.org> > Cr-Commit-Position: refs/heads/master@{#55812} TBR=titzer@chromium.org,clemensh@chromium.org Change-Id: Iae075a8f5225f1678691698bf3a304faa5ae2aab No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:6600 Reviewed-on: https://chromium-review.googlesource.com/1220747Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#55813}
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Clemens Hammacher authored
This is a reland of 6afe7d18. The reason for the revert is fixed in https://crrev.com/c/1219633. Original change's description: > [Liftoff] Implement f32.copysign and f64.copysign > > These are two of the few missing instructions. This CL implements them > for ia32 and x64, and bails out on other platforms. > On x64, we are using the BTR instruction since we cannot have 64-bit > immediates. > > Drive-by: Fix naming of existing bt/bts instructions on x64. > > R=titzer@chromium.org > > Bug: v8:6600 > Change-Id: Ib8532ca811160cd61f4ba7c06b04ce093861c872 > Reviewed-on: https://chromium-review.googlesource.com/1174383 > Commit-Queue: Clemens Hammacher <clemensh@chromium.org> > Reviewed-by: Ben Titzer <titzer@chromium.org> > Cr-Commit-Position: refs/heads/master@{#55780} Bug: v8:6600 Change-Id: I4baeec6b02b17450988cfa7fedd5037f9cfe1638 Reviewed-on: https://chromium-review.googlesource.com/1219508Reviewed-by: Ben Titzer <titzer@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#55812}
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- 11 Sep, 2018 2 commits
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Clemens Hammacher authored
This reverts commit 6afe7d18. Reason for revert: Failures (-2e+66 vs. -2e+66): https://ci.chromium.org/p/v8/builders/luci.v8.ci/V8%20Linux%20-%20debug/22148 Original change's description: > [Liftoff] Implement f32.copysign and f64.copysign > > These are two of the few missing instructions. This CL implements them > for ia32 and x64, and bails out on other platforms. > On x64, we are using the BTR instruction since we cannot have 64-bit > immediates. > > Drive-by: Fix naming of existing bt/bts instructions on x64. > > R=titzer@chromium.org > > Bug: v8:6600 > Change-Id: Ib8532ca811160cd61f4ba7c06b04ce093861c872 > Reviewed-on: https://chromium-review.googlesource.com/1174383 > Commit-Queue: Clemens Hammacher <clemensh@chromium.org> > Reviewed-by: Ben Titzer <titzer@chromium.org> > Cr-Commit-Position: refs/heads/master@{#55780} TBR=titzer@chromium.org,clemensh@chromium.org Change-Id: I4377c13346b42b65e8db04cbd15fc2f906113f65 No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:6600 Reviewed-on: https://chromium-review.googlesource.com/1219446Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#55783}
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Clemens Hammacher authored
These are two of the few missing instructions. This CL implements them for ia32 and x64, and bails out on other platforms. On x64, we are using the BTR instruction since we cannot have 64-bit immediates. Drive-by: Fix naming of existing bt/bts instructions on x64. R=titzer@chromium.org Bug: v8:6600 Change-Id: Ib8532ca811160cd61f4ba7c06b04ce093861c872 Reviewed-on: https://chromium-review.googlesource.com/1174383 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Ben Titzer <titzer@chromium.org> Cr-Commit-Position: refs/heads/master@{#55780}
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- 04 Sep, 2018 1 commit
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Clemens Hammacher authored
Since https://crrev.com/c/1112003, the memory size is stored as size_t instead of uint32_t in order to support 4GB memories. Loading it as uint32_t only works on little-endian systems, and only for memory sizes <4GB. This CL fixes this to load and process the memory size as pointer-sized value. Additional platform-specific methods are added to perform a shift by a constant value. This can be reused to improve the generated code for other shifts. R=titzer@chromium.org Bug: v8:8130, v8:6600 Change-Id: Ifa688a3ed0e2809190571f24bdf47a7f53880b3d Reviewed-on: https://chromium-review.googlesource.com/1203950 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Ben Titzer <titzer@chromium.org> Cr-Commit-Position: refs/heads/master@{#55609}
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- 10 Aug, 2018 1 commit
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Clemens Hammacher authored
Most platforms do not need these methods. Thus, make them private to the mips headers. R=titzer@chromium.org Bug: v8:6600 Change-Id: I3fb1a2a3fd9a53dfc55b45763c150911db43b537 Reviewed-on: https://chromium-review.googlesource.com/1169203Reviewed-by: Ben Titzer <titzer@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#55032}
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- 06 Jul, 2018 1 commit
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Sigurd Schneider authored
This CL surfaces AssemblerOptions to CodeAssembler::GenerateCode and to pipeline methods. To allow forward declaring AssemblerOptions, AssemblerBase::Options was moved out of the AssemblerBase class. Bug: v8:6666 Change-Id: If9fc50d3d4767bb5dd39a0c3b6e094021f4cae2b Reviewed-on: https://chromium-review.googlesource.com/1127039 Commit-Queue: Sigurd Schneider <sigurds@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by: Jakob Gruber <jgruber@chromium.org> Cr-Commit-Position: refs/heads/master@{#54286}
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- 03 Jul, 2018 4 commits
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Clemens Hammacher authored
This is an optimization to avoid an unneeded "mov <reg>, #0" instruction. Instead, we can just directly use the zero register. R=ahaas@chromium.org Bug: chromium:854011, v8:6600 Change-Id: I187d7a659c42d7d4a6d5798eddff8b7ee0983bbc Reviewed-on: https://chromium-review.googlesource.com/1124684 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#54186}
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Clemens Hammacher authored
We need to push the sign-extended constant instead of just the lower 32 bits. Otherwise, the callee might read stale data from the stack. Bug: chromium:854011, v8:6600 R=ahaas@chromium.org CC=rodolph.perfetta@arm.com Change-Id: Iafcfd6ba9532771615b41215fb4d1a2b85ce5623 Reviewed-on: https://chromium-review.googlesource.com/1124683Reviewed-by: Andreas Haas <ahaas@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#54185}
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Clemens Hammacher authored
An i64 to i32 conversion within the same register is a noop on arm64, since i32 operations just use the "W" part of the register anyway. R=ahaas@chromium.org CC=rodolph.perfetta@arm.com Bug: v8:6600 Change-Id: Ia7cb49673c4997dc095736a054d052ffd91bb957 Reviewed-on: https://chromium-review.googlesource.com/1124449Reviewed-by: Andreas Haas <ahaas@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#54175}
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Clemens Hammacher authored
Only use the "W" part (lower 32 bit) of the src register. Otherwise, we can get results larger than 32. R=ahaas@chromium.org CC=rodolph.perfetta@arm.com Bug: v8:7914, chromium:854011 Change-Id: I6329231e6cc0ae537c165b2d383fc5a14bd28ca3 Reviewed-on: https://chromium-review.googlesource.com/1122409 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#54152}
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- 02 Jul, 2018 1 commit
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Clemens Hammacher authored
On Windows (32-bit), we need to emit explicit stack limit checks for stack frames bigger than one page (4kB). This CL implements this by emitting corresponding code at the end of Liftoff functions if needed. R=mstarzinger@chromium.org Bug: v8:7908, v8:6600 Change-Id: Iacb3e7afdd433a4e68620d9230bd0ba473611da8 Reviewed-on: https://chromium-review.googlesource.com/1120175 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#54141}
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- 28 Jun, 2018 1 commit
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Michael Starzinger authored
This loads the stack limit address from the instance object instead of embedding it into the instruction stream. It is another piece towards making the generated code independent of the Isolate. R=clemensh@chromium.org BUG=v8:7424 Change-Id: I9381956adf2d7c42f6626708229cfdd5c4ca114f Reviewed-on: https://chromium-review.googlesource.com/1117189 Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#54076}
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- 20 Jun, 2018 1 commit
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Ben L. Titzer authored
This CL attempts to simplify the Assembler's dependency on the isolate, in particular on a global "serializer_enabled" mode contained therein. The "serializer_enabled" condition enabled and disabled a number of things in both the assemblers and macro assemblers. To make these dependencies explicit, the Assembler::IsolateData is refactored to be a proper Assembler::Options struct that controls specific assembler behaviors, with default settings easily computable from the isolate. This also helps make the contract for compiling WASM code more explicit (since WASM code needs to have reloc info recorded for external references) we can explicitly enable this recording without trying to "trick" the assembler using "serializer_enabled". R=jgruber@chromium.org CC=mstarzinger@chromium.org, herhut@chromium.org Change-Id: I7a8ba49df7b75b292d73ec2aa6e507c27a3d99c8 Reviewed-on: https://chromium-review.googlesource.com/1105982 Commit-Queue: Ben Titzer <titzer@chromium.org> Reviewed-by: Jakob Gruber <jgruber@chromium.org> Cr-Commit-Position: refs/heads/master@{#53890}
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- 11 Jun, 2018 1 commit
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Michael Starzinger authored
This switches Liftoff code to use WebAssembly runtime stubs instead of builtin calls for handling traps, similar to what we use in TurboFan generated code as well. R=clemensh@chromium.org BUG=v8:7424 Change-Id: If2554067b3e294220306c67861bb1fb14db7b492 Reviewed-on: https://chromium-review.googlesource.com/1087275 Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#53644}
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- 07 Jun, 2018 1 commit
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Michael Starzinger authored
This makes all runtime calls compiled by Liftoff load the respective CEntry builtin from the instance object instead of embedding it into the instruction stream. Another step towards making the code independent of the originating Isolate. As a drive-by this also changes one implicit runtime call in the stack check in the TurboFan backend in a similar fashion. R=clemensh@chromium.org BUG=v8:7424 Change-Id: Ifab5995aa95250d6fae60ef5debb98aee2b6fc0c Reviewed-on: https://chromium-review.googlesource.com/1089067 Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#53578}
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- 05 Jun, 2018 1 commit
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Igor Sheludko authored
This CL introduces a new gn argument: v8_enable_pointer_compression which is false by default. All the changes done in this CL are made under this flag. Upper half-word of a Smi word must be properly sign-extended according to the sign of the lower-half containing the actual Smi value. Bug: v8:7703 Cq-Include-Trybots: luci.chromium.try:linux_chromium_rel_ng Change-Id: I2b52ab49cd18c7c613130705de445fef44c30ac5 Reviewed-on: https://chromium-review.googlesource.com/1061175Reviewed-by: Yang Guo <yangguo@chromium.org> Reviewed-by: Toon Verwaest <verwaest@chromium.org> Reviewed-by: Jaroslav Sevcik <jarin@chromium.org> Reviewed-by: Ben Titzer <titzer@chromium.org> Commit-Queue: Igor Sheludko <ishell@chromium.org> Cr-Commit-Position: refs/heads/master@{#53519}
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- 29 May, 2018 1 commit
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Vincent Belliard authored
Bug: v8:6600 Change-Id: I8662ac3589a6244565402c748624ea03d3e31960 Reviewed-on: https://chromium-review.googlesource.com/1071719Reviewed-by: Ben Titzer <titzer@chromium.org> Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Cr-Commit-Position: refs/heads/master@{#53424}
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- 18 May, 2018 2 commits
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Vincent Belliard authored
Bug: v8:6600 Change-Id: I64ab212badf1b54d3e50466b74b30eb2866fbc9e Reviewed-on: https://chromium-review.googlesource.com/1060345Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Cr-Commit-Position: refs/heads/master@{#53265}
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Vincent Belliard authored
For AArch64, clean correctly the pools when the compilation is aborted Bug: v8:6600 Change-Id: I4bacdbeae49290ece0ce1bf47319bf7076fec37c Reviewed-on: https://chromium-review.googlesource.com/1066151 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#53263}
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- 14 May, 2018 1 commit
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Predrag Rudic authored
Change-Id: I1815de5bc5fc955014cba8099e8c704a23a2e9be Reviewed-on: https://chromium-review.googlesource.com/1044187Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#53148}
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- 09 May, 2018 1 commit
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Vincent Belliard authored
Remove cp from cache register list Bug: v8:6600 Change-Id: If17d4558e4f89dd620c757e2a8288658f1489435 Reviewed-on: https://chromium-review.googlesource.com/1047645Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Cr-Commit-Position: refs/heads/master@{#53114}
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- 04 May, 2018 1 commit
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Vincent Belliard authored
Bug: v8:6600 Change-Id: I1bd2db402d6e97ab468dc24cd4d12bef6523d784 Reviewed-on: https://chromium-review.googlesource.com/1043091 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52999}
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- 03 May, 2018 6 commits
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Vincent Belliard authored
Bug: v8:6600 Change-Id: I1d8447349f73985653d3124c2b76d8756b0bf30a Reviewed-on: https://chromium-review.googlesource.com/1040673 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52964}
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Vincent Belliard authored
Define and use TurboAssembler::AssertUnreachable Bug: v8:6600 Change-Id: I6901896ea4fd7e0fe24dd76a1afbb409a24a2994 Reviewed-on: https://chromium-review.googlesource.com/1040766 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52963}
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Vincent Belliard authored
Bug: v8:6600 Change-Id: I9e4b4770286cb08e83dd5dbf9b5ae5cfd7d4d411 Reviewed-on: https://chromium-review.googlesource.com/1040649 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52962}
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Vincent Belliard authored
Bug: v8:6600 Change-Id: If52fd4600c178354cb0631d062be71d19cc10a89 Reviewed-on: https://chromium-review.googlesource.com/1040669 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52961}
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Vincent Belliard authored
Bug: v8:6600 Change-Id: Ia494d7fefee2dc6ae6f31ea73e35c0921953c2c0 Reviewed-on: https://chromium-review.googlesource.com/1040666 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52959}
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Clemens Hammacher authored
Now that wasm-linkage.h is split off, we can easily implement {MoveToReturnRegister} in platform independent code. R=titzer@chromium.org Bug: v8:6600 Change-Id: I072a0ee48d58ed29e0df489016f838915c3f2cb2 Reviewed-on: https://chromium-review.googlesource.com/1041690 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Ben Titzer <titzer@chromium.org> Cr-Commit-Position: refs/heads/master@{#52939}
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- 01 May, 2018 2 commits
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Vincent Belliard authored
Bug: v8:6600 Change-Id: Icdb53714f50add1a9e25025c5b7d52b90d071aa5 Reviewed-on: https://chromium-review.googlesource.com/1036939Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Cr-Commit-Position: refs/heads/master@{#52901}
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Vincent Belliard authored
Bug: v8:6600 Change-Id: I442a76ffc3bcb5e93a7865eb30740556b18cbd79 Reviewed-on: https://chromium-review.googlesource.com/1033731 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52899}
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- 27 Apr, 2018 4 commits
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Vincent Belliard authored
Bug: v8:6600 Change-Id: I3aa174e28db83ca9e9f7a7b65c8007af8227908a Reviewed-on: https://chromium-review.googlesource.com/1028764 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52864}
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Vincent Belliard authored
Bug: v8:6600 Change-Id: Iec1804b89ed853833596a498bb1dfc15bb16c4ce Reviewed-on: https://chromium-review.googlesource.com/1028763 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52861}
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Vincent Belliard authored
Bug: v8:6600 Change-Id: I2e18700344ce57c78c096fba1956d82f9e29ffa6 Reviewed-on: https://chromium-review.googlesource.com/1026469 Commit-Queue: Vincent Belliard <vincent.belliard@arm.com> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#52858}
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Clemens Hammacher authored
This adds support for f64.min and f64.max, implemented on ia32, x64, mips and mips64. R=ahaas@chromium.org Bug: v8:6600 Change-Id: Ib4383df08692c76df5861fe71a96c4354fdf10c1 Reviewed-on: https://chromium-review.googlesource.com/1028235 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#52838}
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- 26 Apr, 2018 1 commit
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Clemens Hammacher authored
This adds support for f32.min and f32.max, implemented on ia32, x64, mips and mips64. R=ahaas@chromium.org Bug: v8:6600 Change-Id: If73abf3cf46011ba84158ed2ec02d074adcf4ba2 Reviewed-on: https://chromium-review.googlesource.com/1027841 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#52803}
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