1. 22 Mar, 2019 1 commit
  2. 26 Feb, 2019 1 commit
  3. 13 Feb, 2019 1 commit
  4. 02 Jan, 2019 1 commit
  5. 19 Dec, 2018 1 commit
  6. 25 Oct, 2018 1 commit
  7. 12 Sep, 2018 3 commits
    • Clemens Hammacher's avatar
      Reland^2 "[Liftoff] Implement f32.copysign and f64.copysign" · a39fcbd2
      Clemens Hammacher authored
      This is a reland of 6afe7d18.
      The reason for the revert is fixed in https://crrev.com/c/1219633.
      
      Original change's description:
      > [Liftoff] Implement f32.copysign and f64.copysign
      >
      > These are two of the few missing instructions. This CL implements them
      > for ia32 and x64, and bails out on other platforms.
      > On x64, we are using the BTR instruction since we cannot have 64-bit
      > immediates.
      >
      > Drive-by: Fix naming of existing bt/bts instructions on x64.
      >
      > R=titzer@chromium.org
      >
      > Bug: v8:6600
      > Change-Id: Ib8532ca811160cd61f4ba7c06b04ce093861c872
      > Reviewed-on: https://chromium-review.googlesource.com/1174383
      > Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      > Reviewed-by: Ben Titzer <titzer@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#55780}
      
      Bug: v8:6600
      Change-Id: Ie14ba3a14848ba8e67f97e66d3379178f35dea40
      
      TBR=titzer@chromium.org
      
      Change-Id: Ie14ba3a14848ba8e67f97e66d3379178f35dea40
      Reviewed-on: https://chromium-review.googlesource.com/1219693Reviewed-by: 's avatarClemens Hammacher <clemensh@chromium.org>
      Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55817}
      a39fcbd2
    • Clemens Hammacher's avatar
      Revert "Reland "[Liftoff] Implement f32.copysign and f64.copysign"" · 1c860ca4
      Clemens Hammacher authored
      This reverts commit f0f5f877.
      
      Reason for revert: Merge conflict (does not compile).
      
      Original change's description:
      > Reland "[Liftoff] Implement f32.copysign and f64.copysign"
      > 
      > This is a reland of 6afe7d18.
      > The reason for the revert is fixed in https://crrev.com/c/1219633.
      > 
      > Original change's description:
      > > [Liftoff] Implement f32.copysign and f64.copysign
      > >
      > > These are two of the few missing instructions. This CL implements them
      > > for ia32 and x64, and bails out on other platforms.
      > > On x64, we are using the BTR instruction since we cannot have 64-bit
      > > immediates.
      > >
      > > Drive-by: Fix naming of existing bt/bts instructions on x64.
      > >
      > > R=titzer@chromium.org
      > >
      > > Bug: v8:6600
      > > Change-Id: Ib8532ca811160cd61f4ba7c06b04ce093861c872
      > > Reviewed-on: https://chromium-review.googlesource.com/1174383
      > > Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      > > Reviewed-by: Ben Titzer <titzer@chromium.org>
      > > Cr-Commit-Position: refs/heads/master@{#55780}
      > 
      > Bug: v8:6600
      > Change-Id: I4baeec6b02b17450988cfa7fedd5037f9cfe1638
      > Reviewed-on: https://chromium-review.googlesource.com/1219508
      > Reviewed-by: Ben Titzer <titzer@chromium.org>
      > Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#55812}
      
      TBR=titzer@chromium.org,clemensh@chromium.org
      
      Change-Id: Iae075a8f5225f1678691698bf3a304faa5ae2aab
      No-Presubmit: true
      No-Tree-Checks: true
      No-Try: true
      Bug: v8:6600
      Reviewed-on: https://chromium-review.googlesource.com/1220747Reviewed-by: 's avatarClemens Hammacher <clemensh@chromium.org>
      Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55813}
      1c860ca4
    • Clemens Hammacher's avatar
      Reland "[Liftoff] Implement f32.copysign and f64.copysign" · f0f5f877
      Clemens Hammacher authored
      This is a reland of 6afe7d18.
      The reason for the revert is fixed in https://crrev.com/c/1219633.
      
      Original change's description:
      > [Liftoff] Implement f32.copysign and f64.copysign
      >
      > These are two of the few missing instructions. This CL implements them
      > for ia32 and x64, and bails out on other platforms.
      > On x64, we are using the BTR instruction since we cannot have 64-bit
      > immediates.
      >
      > Drive-by: Fix naming of existing bt/bts instructions on x64.
      >
      > R=titzer@chromium.org
      >
      > Bug: v8:6600
      > Change-Id: Ib8532ca811160cd61f4ba7c06b04ce093861c872
      > Reviewed-on: https://chromium-review.googlesource.com/1174383
      > Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      > Reviewed-by: Ben Titzer <titzer@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#55780}
      
      Bug: v8:6600
      Change-Id: I4baeec6b02b17450988cfa7fedd5037f9cfe1638
      Reviewed-on: https://chromium-review.googlesource.com/1219508Reviewed-by: 's avatarBen Titzer <titzer@chromium.org>
      Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55812}
      f0f5f877
  8. 11 Sep, 2018 2 commits
  9. 16 Aug, 2018 1 commit
  10. 14 Aug, 2018 2 commits
    • Benedikt Meurer's avatar
      [turbofan] Further optimize DataView accesses. · 5fecd146
      Benedikt Meurer authored
      This adds support for unaligned load/store access to the DataView
      backing store and uses byteswap operations to fix up the endianess
      when necessary. This changes the Word32ReverseBytes operator to be
      a required operator and adds the missing support on the Intel and
      ARM platforms (on 64-bit platforms the Word64ReverseBytes operator
      is also mandatory now).
      
      This further improves the performance on the dataviewperf.js test
      mentioned in the tracking bug by up to 40%, and at the same time
      reduces the code complexity in the EffectControlLinearizer.
      
      Bug: chromium:225811
      Change-Id: I7c1ec826faf46a144a5a9068f8f815a5fd040997
      Reviewed-on: https://chromium-review.googlesource.com/1174252Reviewed-by: 's avatarSigurd Schneider <sigurds@chromium.org>
      Commit-Queue: Benedikt Meurer <bmeurer@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55111}
      5fecd146
    • Leszek Swirski's avatar
      Revert "[turbofan] Further optimize DataView accesses." · 6a62d88e
      Leszek Swirski authored
      This reverts commit c46915b9.
      
      Reason for revert: Disasm failures https://ci.chromium.org/p/v8/builders/luci.v8.ci/V8%20Linux%20-%20debug/21727 
      
      Original change's description:
      > [turbofan] Further optimize DataView accesses.
      > 
      > This adds support for unaligned load/store access to the DataView
      > backing store and uses byteswap operations to fix up the endianess
      > when necessary. This changes the Word32ReverseBytes operator to be
      > a required operator and adds the missing support on the Intel and
      > ARM platforms (on 64-bit platforms the Word64ReverseBytes operator
      > is also mandatory now).
      > 
      > This further improves the performance on the dataviewperf.js test
      > mentioned in the tracking bug by up to 40%, and at the same time
      > reduces the code complexity in the EffectControlLinearizer.
      > 
      > Bug: chromium:225811
      > Change-Id: I296170b828c2ccc1c317ed37840b564aa14cdec2
      > Reviewed-on: https://chromium-review.googlesource.com/1172777
      > Commit-Queue: Benedikt Meurer <bmeurer@chromium.org>
      > Reviewed-by: Sigurd Schneider <sigurds@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#55099}
      
      TBR=sigurds@chromium.org,bmeurer@chromium.org
      
      Change-Id: If7a62e3a1a4ad26823fcbd2ab6eb4c053ad11c49
      No-Presubmit: true
      No-Tree-Checks: true
      No-Try: true
      Bug: chromium:225811
      Reviewed-on: https://chromium-review.googlesource.com/1174171Reviewed-by: 's avatarLeszek Swirski <leszeks@chromium.org>
      Commit-Queue: Leszek Swirski <leszeks@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55107}
      6a62d88e
  11. 13 Aug, 2018 1 commit
    • Benedikt Meurer's avatar
      [turbofan] Further optimize DataView accesses. · c46915b9
      Benedikt Meurer authored
      This adds support for unaligned load/store access to the DataView
      backing store and uses byteswap operations to fix up the endianess
      when necessary. This changes the Word32ReverseBytes operator to be
      a required operator and adds the missing support on the Intel and
      ARM platforms (on 64-bit platforms the Word64ReverseBytes operator
      is also mandatory now).
      
      This further improves the performance on the dataviewperf.js test
      mentioned in the tracking bug by up to 40%, and at the same time
      reduces the code complexity in the EffectControlLinearizer.
      
      Bug: chromium:225811
      Change-Id: I296170b828c2ccc1c317ed37840b564aa14cdec2
      Reviewed-on: https://chromium-review.googlesource.com/1172777
      Commit-Queue: Benedikt Meurer <bmeurer@chromium.org>
      Reviewed-by: 's avatarSigurd Schneider <sigurds@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#55099}
      c46915b9
  12. 30 Jul, 2018 1 commit
    • jgruber's avatar
      [builtins,x64] More information about root-relative accesses · 1bef7d21
      jgruber authored
      When disassembling code (in particular embedded builtins), try to
      print better information about root-relative accesses. For example:
      
       REX.W movq rdx,[r13+0x548]
       REX.W movq rax,[r13+0x10a8]
      
      turns into
      
       REX.W movq rdx,[r13+0x548] (root (0x1ff420d0ccd9 <FixedArray[1672]>))
       REX.W movq rax,[r13+0x10a8] (external reference (check_object_type))
      
      This is a band-aid solution until we come up with something better. It
      does not understand multi-instruction sequences (such as loads from
      the builtins constants table), assumes every kRootRegister-relative
      access is actually root-relative (i.e. the register is not initialized
      to some other value), and is limited to a particular instruction
      pattern.
      
      Bug: v8:6666,v8:7969
      Change-Id: I35af92e8233c9bb0f2ad6ba0e86bd0ab69177205
      Reviewed-on: https://chromium-review.googlesource.com/1146806
      Commit-Queue: Jakob Gruber <jgruber@chromium.org>
      Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#54777}
      1bef7d21
  13. 26 Jul, 2018 1 commit
  14. 09 May, 2018 1 commit
  15. 05 Mar, 2018 1 commit
  16. 01 Mar, 2018 1 commit
  17. 16 Feb, 2018 1 commit
  18. 07 Feb, 2018 1 commit
  19. 15 Jan, 2018 1 commit
  20. 12 Jan, 2018 1 commit
  21. 19 Dec, 2017 1 commit
  22. 18 Dec, 2017 1 commit
  23. 11 Dec, 2017 1 commit
  24. 04 Dec, 2017 1 commit
  25. 02 Dec, 2017 1 commit
    • Mathias Bynens's avatar
      Normalize casing of hexadecimal digits · 822be9b2
      Mathias Bynens authored
      This patch normalizes the casing of hexadecimal digits in escape
      sequences of the form `\xNN` and integer literals of the form
      `0xNNNN`.
      
      Previously, the V8 code base used an inconsistent mixture of uppercase
      and lowercase.
      
      Google’s C++ style guide uses uppercase in its examples:
      https://google.github.io/styleguide/cppguide.html#Non-ASCII_Characters
      
      Moreover, uppercase letters more clearly stand out from the lowercase
      `x` (or `u`) characters at the start, as well as lowercase letters
      elsewhere in strings.
      
      BUG=v8:7109
      TBR=marja@chromium.org,titzer@chromium.org,mtrofin@chromium.org,mstarzinger@chromium.org,rossberg@chromium.org,yangguo@chromium.org,mlippautz@chromium.org
      NOPRESUBMIT=true
      
      Cq-Include-Trybots: master.tryserver.blink:linux_trusty_blink_rel;master.tryserver.chromium.linux:linux_chromium_rel_ng
      Change-Id: I790e21c25d96ad5d95c8229724eb45d2aa9e22d6
      Reviewed-on: https://chromium-review.googlesource.com/804294
      Commit-Queue: Mathias Bynens <mathias@chromium.org>
      Reviewed-by: 's avatarJakob Kummerow <jkummerow@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#49810}
      822be9b2
  26. 18 Oct, 2017 1 commit
  27. 13 Oct, 2017 1 commit
  28. 22 May, 2017 1 commit
  29. 17 Apr, 2017 1 commit
    • gdeepti's avatar
      [wasm] Implement wasm x64 I16x8 Ops · c8c03c15
      gdeepti authored
       - Add I16x8 Splat, ExtractLane, ReplaceLane, shift ops, Some BinOps and compare ops
       - Add pshufhw, pshuflw in the assembler, disassembler
       - Fix incorrect modrm for pextrw, this bug disregards the register allocated and always makes pextrw use rax.
       - Fix pextrw disasm to take the 0 - 7 bits of the immediate instead of 0 - 3.
       - Pextrw, pinsrw are in the assembler use 128 bit encodings, pextrw, pinsrw in the disassembler use legacy encodings, fix inconsistencies causing weird code gen when --print-code is used.
      
      Review-Url: https://codereview.chromium.org/2767983002
      Cr-Commit-Position: refs/heads/master@{#44664}
      c8c03c15
  30. 22 Mar, 2017 1 commit
    • gdeepti's avatar
      Add pshufw instruction, fix inconsistencies with pextrw instruction. · 9d8d4dfa
      gdeepti authored
      Current implementation of the pextrw instruction is the legacy SSE2 instruction in the assembler (66 0F C5), and SSE4 implementation(66 0F 3A 15) in disasm-x64.cc, this causes incorrect instruction encodings to be printed when using --print-code flag for debug, in this case, causes over flow of bytes, and subsequent instructions to be incorrectly disassembled. Fixing to use SSE4 encodings in the assembler cosistent with pextrb, pextrd.
      
      R=bbudge@chromium.org, mtrofin@chromium.org
      
      Review-Url: https://codereview.chromium.org/2771513002
      Cr-Commit-Position: refs/heads/master@{#44047}
      9d8d4dfa
  31. 12 Sep, 2016 1 commit
  32. 22 Aug, 2016 1 commit
  33. 03 Aug, 2016 1 commit
  34. 21 Jul, 2016 1 commit
  35. 11 Jul, 2016 1 commit
  36. 17 Jun, 2016 1 commit