- 23 Jul, 2015 1 commit
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Ilija.Pavlovic authored
In simulator data trace, DSLL did not print result and BAL/BGEZAL omitted result from an instruction executed in delay slot. TEST=cctest/test-assembler-mips[64] BUG= Review URL: https://codereview.chromium.org/1245173002 Cr-Commit-Position: refs/heads/master@{#29796}
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- 19 Jun, 2015 1 commit
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Djordje.Pesic authored
Added memory and register data tracing to mips32 simulator Review URL: https://codereview.chromium.org/1195783002 Cr-Commit-Position: refs/heads/master@{#29163}
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- 22 May, 2015 1 commit
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1145223002 Cr-Commit-Position: refs/heads/master@{#28595}
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- 20 May, 2015 1 commit
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svenpanne authored
Alas, this involved quite a bit of copy-n-paste between the architectures, but this is caused by the very convoluted relationships, lifetimes and distribution of responsibilities. This should really be cleaned up by moving code around and using STL maps, but that's not really a priority right now. Bonus: Fixed leaks in the ARM64 disassembler tests. Review URL: https://codereview.chromium.org/1132943007 Cr-Commit-Position: refs/heads/master@{#28496}
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- 19 May, 2015 1 commit
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1147493002 Cr-Commit-Position: refs/heads/master@{#28472}
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- 14 May, 2015 2 commits
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paul.lind authored
Reason for revert: Simulator test failures in RunChangeFloat64ToInt.., RunChangeTaggedToInt32, div-mul-minus-one Original issue's description: > Implement assembler, disassembler tests for all instructions for mips32 > and mips64. Additionally, add missing single precision float instructions > for r2 and r6 architecture variants in assembler, simulator and disassembler > with corresponding tests. BUG= Review URL: https://codereview.chromium.org/1143473003 Cr-Commit-Position: refs/heads/master@{#28404}
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Djordje.Pesic authored
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests. Review URL: https://codereview.chromium.org/1119203003 Cr-Commit-Position: refs/heads/master@{#28402}
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- 30 Apr, 2015 1 commit
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Djordje.Pesic authored
Added rounding according to fcsr, CVT_W_D and RINT.D instruction in assembler, dissasembler and simulator and wrote appropiate tests. BUG= Review URL: https://codereview.chromium.org/1108583003 Cr-Commit-Position: refs/heads/master@{#28143}
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- 30 Mar, 2015 1 commit
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dusan.milosavljevic authored
TEST= BUG= Review URL: https://codereview.chromium.org/1046873004 Cr-Commit-Position: refs/heads/master@{#27530}
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- 12 Aug, 2014 1 commit
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dusan.milosavljevic@imgtec.com authored
Fixing gclient runhooks failure caused by reverted commit r23050. TEST= BUG= R=jkummerow@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/467583002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23088 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 11 Aug, 2014 4 commits
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machenbach@chromium.org authored
This reverts commit r23050 for breaking runhooks on chromium. See e.g.: http://build.chromium.org/p/client.v8/builders/Chrome%20Linux%20Perf/builds/1438/steps/runhooks/logs/stdio TBR=jochen@chromium.org Review URL: https://codereview.chromium.org/458983003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23053 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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dusan.milosavljevic@imgtec.com authored
Original commit r23028 breaks ARM64 build due to conflicting FP64 symbolic constant definition in src/globals.h and src/arm64/constants-arm64.h. TEST= BUG= R=jkummerow@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/457313003 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23050 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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jochen@chromium.org authored
Breaks compilation of ARM64. | Additional summary: | - Introduce fp64 fpu mode into mips32 port required for r6. | - Implement runtime detections for fpu mode and arch. revision to preserve | compatibility with previous architecture revisions. | | TEST= | BUG= | R=jkummerow@chromium.org, paul.lind@imgtec.com | | Review URL: https://codereview.chromium.org/453043002 BUG=none LOG=n TBR=jkummerow@chromium.org Review URL: https://codereview.chromium.org/458193002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23030 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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dusan.milosavljevic@imgtec.com authored
Additional summary: - Introduce fp64 fpu mode into mips32 port required for r6. - Implement runtime detections for fpu mode and arch. revision to preserve compatibility with previous architecture revisions. TEST= BUG= R=jkummerow@chromium.org, paul.lind@imgtec.com Review URL: https://codereview.chromium.org/453043002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23028 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 20 Jun, 2014 1 commit
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mstarzinger@chromium.org authored
R=rossberg@chromium.org Review URL: https://codereview.chromium.org/333013002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21894 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 03 Jun, 2014 2 commits
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ishell@chromium.org authored
Fixed lint errors caused by "runtime/references" rule (Is this a non-const reference?) and the rule itself is restored. BUG=v8:3326 LOG=N R=jkummerow@chromium.org Review URL: https://codereview.chromium.org/314723002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21651 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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jochen@chromium.org authored
- this avoids using relative include paths which are forbidden by the style guide - makes the code more readable since it's clear which header is meant - allows for starting to use checkdeps BUG=none R=jkummerow@chromium.org, danno@chromium.org LOG=n Review URL: https://codereview.chromium.org/304153016 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21625 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 20 May, 2014 1 commit
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ishell@chromium.org authored
BUG=chromium:369962 LOG=N R=jkummerow@chromium.org Review URL: https://codereview.chromium.org/282783004 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21382 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 29 Apr, 2014 1 commit
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bmeurer@chromium.org authored
R=svenpanne@chromium.org Review URL: https://codereview.chromium.org/259183002 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@21035 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 12 Feb, 2014 1 commit
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ulan@chromium.org authored
BUG=v8:3113 LOG=Y R=jochen@chromium.org, rmcilroy@chromium.org, rodolph.perfetta@arm.com Review URL: https://codereview.chromium.org/148293020 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19311 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 22 Nov, 2013 1 commit
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palfia@homejinni.com authored
This commit fixes a lot of test failures that we saw earlier in the buildbots (http://build.chromium.org/p/client.v8/builders/V8%20Linux%20-%20mips%20-%20sim/builds/3034/steps/Check/logs/stdio). In some very rare cases the code age stub address can be 0xXXXX0000 and in this case the li maco instruction emits only 1 instruction (instead of the expected 2). Thus the code age sequence will be 6 instructions long instead of 7, which breaks the code aging feature. This change makes sure that li always emits 2 instructions and it also simplifies the code aging sequence. Also fixes a small mistake in the simulator at the jalr instruction. BUG= R=gergely@homejinni.com Review URL: https://codereview.chromium.org/83583003 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@18030 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 19 Jun, 2013 1 commit
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plind44@gmail.com authored
BUG=v8:2628 TEST=cctest/test-cpu-profiler/SampleWhenFrameIsNotSetup R=jkummerow@chromium.org, yurys@chromium.org Review URL: https://codereview.chromium.org/17265004 Patch from Dusan Milosavljevic <Dusan.Milosavljevic@rt-rk.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@15213 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 12 Apr, 2013 1 commit
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plind44@gmail.com authored
Port r14230 (76c22097) Original commit message: Native method invocation from the arm/simulator-arm.cc previously made non-portable assumptions about calling conventions. This was okay for 32-bit stack-based machines, where by-value structs are automatically materialized on the stack, and where both int and double parameters could be passed on the stack. However they are not okay for x86-64, which has an elaborate scheme for passing parameters in registers. This CL replaces the previous non-portable code paths with portable code, using call-sites that accurately match the prototype of the callee. BUG= Review URL: https://codereview.chromium.org/13989008 Patch from Akos Palfi <palfia@homejinni.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14239 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 02 Apr, 2013 1 commit
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ulan@chromium.org authored
BUG=none Review URL: https://chromiumcodereview.appspot.com/13469002 Patch from Hans Wennborg <hans@chromium.org>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14113 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 29 Nov, 2012 1 commit
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jkummerow@chromium.org authored
Port r13054 (636985d7) BUG= TEST= Review URL: https://codereview.chromium.org/11415192 Patch from Akos Palfi <palfia@homejinni.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13089 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 24 May, 2012 1 commit
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yangguo@chromium.org authored
Port r11623 (f153116d) BUG= TEST= Review URL: https://chromiumcodereview.appspot.com/10436012 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11639 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 21 Mar, 2012 1 commit
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danno@chromium.org authored
List of changes: -added a minor optimization to the Simulator that quickly skips nops in the delay slot -slightly re-worked CEntryStub to save a few instructions CEntryStub now expects the following values: -s0: number of arguments including receiver -s1: size of arguments excluding receiver -s2: pointer to builtin function Two new MacroAssembler functions were added to make usage more convenient: -PrepareCEntryArgs(int num_args) to set up s0 and s1 -PrepareCEntryFunction(const ExternalReference&) to set up s2 -removed branch delay slot nops from the most frequently used code areas -reorganized some code to execute fewer instructions -utilized the delay slot of most Ret instructions This does not cover all Rets, only the most obvious cases. Also added a special version of DropAndRet that utilizes the delay slot. -added some comments to code areas where explanation of the register/delay slot usage may be needed -added an optimization to Jump so it doesn't always pre-load the target register BUG= TEST= Review URL: https://chromiumcodereview.appspot.com/9699071 Patch from Daniel Kalmar <kalmard@homejinni.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11099 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 10 Nov, 2011 1 commit
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yangguo@chromium.org authored
Port r9937 (c263a9e). BUG= TEST= Review URL: http://codereview.chromium.org/8509015 Patch from Gergely Kis <gergely@homejinni.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9946 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 26 May, 2011 1 commit
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sgjesse@chromium.org authored
The already working watchpoint break mechanism has been extended to handle "stop" instructions, with text messages. Explanation (also in constants-mips.h): On MIPS Simulator breakpoints can have different codes: - Breaks between 0 and kMaxWatchpointCode are treated as simple watchpoints, the simulator will run through them and print the registers. - Breaks between kMaxWatchpointCode and kMaxStopCode are treated as stop() instructions (see Assembler::stop()). - Breaks larger than kMaxStopCode are simple breaks, dropping you into the debugger. The current values are 31 for kMaxWatchpointCode and 127 for kMaxStopCode. From the user's point of view this works the same way as the ARM stop instruction except for the break code usage detailed above. Ported commits: r5723 (3ba78d24) BUG= TEST= Review URL: http://codereview.chromium.org//7062014 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8069 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 24 May, 2011 1 commit
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sgjesse@chromium.org authored
Make mips-specifc changes for r7999, r8001, r8002. Also bring in changes for older commits 7203, 7279, 7693, 7715, 7788. Mips changes for 7715 (Arm: Support hardfloat in SCons build), and 7693 (Implement hardfloat calling convention in macro assembler and simulator) resulted in changes to SConstruct. BUG= TEST= Review URL: http://codereview.chromium.org//6966031 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8022 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 23 May, 2011 1 commit
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sgjesse@chromium.org authored
Updated to include fixes to several mips arch-specific files, corresponding to recent changes in r7944, r7935, r7926, r7914, r7910, r7895, and parts of r7423, which had previously been missed for mips. Rebased on r7964. The simulator changes were missed on r7893 for code-stubs-mips, where the DirectCEntry stuff was added. There are also a couple small changes to builtins-mips following r7879 for the other architectures. BUG= TEST= Review URL: http://codereview.chromium.org//7042031 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7977 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 09 May, 2011 1 commit
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sgjesse@chromium.org authored
- Merge to current tip of tree, fix build problems. - Remove deprecated source files. - Add cctest test-disasm-mips - Consistently use single-reg push()/pop() (remove uppercase variants) - Add assembler field accessors. - More style fixes. BUG= TEST= Review URL: http://codereview.chromium.org//6965006 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7825 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 05 May, 2011 1 commit
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dslomov@chromium.org authored
BUG= TEST= Committed: http://code.google.com/p/v8/source/detail?r=7734 Committed: http://code.google.com/p/v8/source/detail?r=7784 Review URL: http://codereview.chromium.org/6788023 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7797 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 28 Mar, 2011 1 commit
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sgjesse@chromium.org authored
This commit adds current working versions of assembler, macro-assembler, disassembler, and simulator. All other mips arch files are replaced with stubbed-out versions that will build. Arch independent files are updated as needed to support building and running mips. The only test is cctest/test-assembler-mips, and this passes on the simulator and on mips hardware. TEST=none BUG=none Patch by Paul Lind from MIPS. Review URL: http://codereview.chromium.org/6730029/ git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7388 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 14 Oct, 2010 1 commit
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sgjesse@chromium.org authored
Added USE_SIMULATOR macro that explicitly indicates that we wish to use the simulator as the execution engine. For example, this allows us to run with the ARM simulator on ARM. Patch by Mark Lam <mark.lam@palm.com> from Hewlett-Packard Development Company, LP Review URL: http://codereview.chromium.org/3825001 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5620 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 04 Feb, 2010 1 commit
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sgjesse@chromium.org authored
This is the first step in the MIPS port of V8. It adds assembler, disassembler and simulator for the MIPS32 architecture. Contains stubbed out implementation of all the compiler/code generator infrastructure to make it all build. Patch by Alexandre Rames from Sigma Designs Inc. This is the landing of http://codereview.chromium.org/543161. Review URL: http://codereview.chromium.org/561072 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3799 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 26 Jan, 2010 1 commit
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sgjesse@chromium.org authored
As the start index is already passed it is easy to calculate the "at start" boolean in generated code. Also as direct entry has been implemented this needs to be done in generated code anyway, and therefore might as well be moved to the generated code for RegExp. The "at start" value is now calcualted as a local variable on the native RegExp frame based on the value of the start index argument. The x64 version have been tested on both Linux and 64-bit Windows Vista. For ARM I have tested cctest/test-regexp on ARM hardware, but the rest of the tests have only been run on the ARM simulator. Review URL: http://codereview.chromium.org/554078 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3709 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 06 Jan, 2010 1 commit
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sgjesse@chromium.org authored
Calls to RegExp no longer have to be via a call to the runtime system. A new stub have been added which can handle this call in generated code. The stub checks all the parameters and creates RegExp entry frame in the same way as it is created by the runtime system. Bailout to the runtime system is done whenever an uncommon situation is encountered or when the static data used is not initialized. After running the native RegExp code the last match info is updated like in the runtime system. Currently only ASCII strings are handled. Added another argument to the RegExp entry frame. It indicated whether the call is direct from JavaScript code or through the runtime system. This information is used when RegExp execution is interrupted. If an interruption happens when RegExp code is called directly a retry is issued causing the interruption to be handled via the runtime system. The reason for this is that the direct call to RegExp code does not support garbage collection. Review URL: http://codereview.chromium.org/521028 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3542 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 12 Nov, 2009 2 commits
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erik.corry@gmail.com authored
Also move a function into the macro assembler. Fix some *& placement errors that had accumulated. Review URL: http://codereview.chromium.org/385069 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3293 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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erik.corry@gmail.com authored
Review URL: http://codereview.chromium.org/348019 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3292 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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