- 18 Oct, 2017 1 commit
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Clemens Hammacher authored
This makes the function constexpr and implements it for arbitrary unsigned integer types (up to 64 bits, but this can be extended if needed). R=mstarzinger@chromium.org Bug: v8:6600, v8:6921 Change-Id: I86d427238fadd55abb5a27f31ed648d4b02fc358 Reviewed-on: https://chromium-review.googlesource.com/718457 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#48696}
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- 25 Sep, 2017 1 commit
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Clemens Hammacher authored
Use the (D)CHECK_{EQ,NE,GT,...} macros instead of (D)CHECK with an embedded comparison. This gives better error messages and also does the right comparison for signed/unsigned mismatches. This will allow us to reenable the readability/check cpplint check. R=jarin@chromium.org Bug: v8:6837 Change-Id: I712580c2a4326e06ee3d6d0eb4ff8c7d24f5fdb9 Reviewed-on: https://chromium-review.googlesource.com/671227 Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Reviewed-by:
Jaroslav Sevcik <jarin@chromium.org> Cr-Commit-Position: refs/heads/master@{#48135}
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- 06 Sep, 2017 2 commits
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Mostyn Bramley-Moore authored
This macro is defined all over the place, and often causes macro redefinition errors in jumbo builds. Let's make sure all such instances created in source files are #undef'ed. Candidate files found with: grep -wL '#undef TRACE' $(git grep -wl '#define TRACE' -- '*.cc') While we're at it, let's undef all macros defined in these files. Bug: chromium:746958 Change-Id: I639ca2b141f908457d1b2601cd6d5827dee0ead0 Reviewed-on: https://chromium-review.googlesource.com/652476Reviewed-by:
Mircea Trofin <mtrofin@chromium.org> Reviewed-by:
Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Mostyn Bramley-Moore <mostynb@opera.com> Cr-Commit-Position: refs/heads/master@{#47859}
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sreten.kovacevic authored
MIPS[64]: Port: `[Atomics] Make Atomics.exchange a builtin using TF` and `[Atomics] Make Atomics.compareExchange a builtin using TF` Port 301c1237 and 82b5c8c9 Implemented exchange and compareExchange atomics. Bug: Change-Id: I11a0d3d608ecf809c7947dd560884c6451dcdb3c Reviewed-on: https://chromium-review.googlesource.com/649186Reviewed-by:
Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#47846}
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- 24 Aug, 2017 1 commit
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Michael Starzinger authored
This introduces a {DebugAbort} machine-level operator as well as the corresponding {ArchDebugAbort} backend instruction. The goal of this is to speed up snapshot generation due to cheaper "CSA-asserts". R=jgruber@chromium.org BUG=v8:6688 Bug: v8:6688 Change-Id: If45f7da0652d4bb920c51ab7a7c41f9670434bbb Also-By: jgruber@chromium.org Reviewed-on: https://chromium-review.googlesource.com/628560Reviewed-by:
Jakob Gruber <jgruber@chromium.org> Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#47568}
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- 17 Aug, 2017 1 commit
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Ivica Bogosavljevic authored
Bug: Change-Id: I5b5477b55f42cdfa7978bbe6b8610302f0ec41fb Reviewed-on: https://chromium-review.googlesource.com/612085Reviewed-by:
Miran Karić <Miran.Karic@imgtec.com> Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#47396}
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- 20 Jul, 2017 1 commit
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Bill Budge authored
- Adds opcode for 32/16/8 bit dup instruction. - Matches shuffles that are equivalent to dup's. Bug: v8:6020 Change-Id: I8848d974adf30127d1dc31c09a9517f8f9573ce9 Reviewed-on: https://chromium-review.googlesource.com/571448 Commit-Queue: Bill Budge <bbudge@chromium.org> Reviewed-by:
Martyn Capewell <martyn.capewell@arm.com> Reviewed-by:
Mircea Trofin <mtrofin@chromium.org> Cr-Commit-Position: refs/heads/master@{#46803}
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- 17 Jul, 2017 1 commit
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Ivica Bogosavljevic authored
InstructionSelector::VisitInt32Mul TEST=cctest/test-run-machops/RunInt32MulAndInt32AddP,mjsunit/asm/int32mod-constant Bug: Change-Id: Iaccfc0d0c981e7c7e2f8b06ff3812fe60d1f85d3 Reviewed-on: https://chromium-review.googlesource.com/574367Reviewed-by:
Miran Karić <Miran.Karic@imgtec.com> Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46707}
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- 13 Jul, 2017 1 commit
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Clemens Hammacher authored
There is just one version now, called IsPowerOfTwo. It accepts any integral type. There is one slight semantical change: Called with kMinInt, it previously returned true, because the argument was implicitly casted to an unsigned. It's now (correctly) returning false, so I had to add special handlings of kMinInt in machine-operator-reducer before calling IsPowerOfTwo on that value. R=mlippautz@chromium.org,mstarzinger@chromium.org,jgruber@chromium.org,ishell@chromium.org,yangguo@chromium.org Change-Id: Idc112a89034cdc8c03365b778b33b1c29fefb38d Reviewed-on: https://chromium-review.googlesource.com/568140Reviewed-by:
Igor Sheludko <ishell@chromium.org> Reviewed-by:
Michael Starzinger <mstarzinger@chromium.org> Reviewed-by:
Michael Lippautz <mlippautz@chromium.org> Reviewed-by:
Yang Guo <yangguo@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#46627}
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- 12 Jul, 2017 1 commit
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Michael Starzinger authored
This introduces 2^16 as an upper limit for the allowed value range of a table switch on all architectures. It also fixes several overflows in the table size calculation. R=bmeurer@chromium.org TEST=mjsunit/regress/regress-crbug-736633 BUG=chromium:736633 Change-Id: I931bd226c99eb8a1ae1770c159fc314ff650bf57 Reviewed-on: https://chromium-review.googlesource.com/566829Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#46575}
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- 03 Jul, 2017 1 commit
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Ilija Pavlovic authored
On Loongson 3A, MADD/MSUB instructions are actually fused MADD/MSUB and they can cause failure in some of the tests. Since this optimization is rarely used, and not used at all on MIPS64R6, MADD/MSUB instructions are removed from the source base. TEST= BUG= Change-Id: Ifbb5508a62731bb061f332864ffd1e210e97f963 Reviewed-on: https://chromium-review.googlesource.com/558066Reviewed-by:
Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46387}
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- 28 Jun, 2017 1 commit
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Dusan Simicic authored
Add support for F32x4AddHoriz, I32x4AddHoriz, I16x8AddHoriz operations for mips32 and mips64 architectures. Bug: Change-Id: I5a40f23677418ffd81d4d5229203a439545575b8 Reviewed-on: https://chromium-review.googlesource.com/518016 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Reviewed-by:
Mircea Trofin <mtrofin@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Miran Karić <Miran.Karic@imgtec.com> Reviewed-by:
Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46272}
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- 27 Jun, 2017 1 commit
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Dusan Simicic authored
Add support for I32x4SConvertI16x8Low, I32x4SConvertI16x8High, I32x4UConvertI16x8Low, I32x4UConvertI16x8High, I16x8SConvertI8x16Low, I16x8SConvertI8x16High,I16x8SConvertI32x4, I16x8UConvertI32x4, I16x8UConvertI8x16Low, I16x8UConvertI8x16High, I8x16SConvertI16x8, I8x16UConvertI16x8 operations for mips32 and mips64 architectures. Bug: Change-Id: I32f24956fc8e3c7df7f525bf0d4518161493a3ed Reviewed-on: https://chromium-review.googlesource.com/517500 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Reviewed-by:
Mircea Trofin <mtrofin@chromium.org> Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Miran Karić <Miran.Karic@imgtec.com> Reviewed-by:
Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46260}
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- 20 Jun, 2017 1 commit
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Dusan Simicic authored
Add support for S32x4Shuffle, S16x8Shuffle, S8x16Shuffle for mips and mips64 architectures. Bug: Change-Id: I2c062525ed94edfcb38a53f4bbef02131e313ba3 Reviewed-on: https://chromium-review.googlesource.com/531007 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by:
Bill Budge <bbudge@chromium.org> Reviewed-by:
Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by:
Mircea Trofin <mtrofin@chromium.org> Cr-Commit-Position: refs/heads/master@{#46053}
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- 08 Jun, 2017 1 commit
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bbudge authored
- Eliminates b1x4, b1x8, and b1x16 as distinct WASM types. - All vector comparisons return v128 type. - Eliminates b1xN and, or, xor, not. - Selects take a v128 mask vector and are now bit-wise. - Adds a new test for Select, where mask is non-canonical (not 0's and -1's). LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2919203002 Cr-Commit-Position: refs/heads/master@{#45795}
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- 05 Jun, 2017 1 commit
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dusan.simicic authored
Macro-ization of Turbofan's SIMD Visitor methods in the same way it was done for ARM and x64 architectures. BUG= Review-Url: https://codereview.chromium.org/2910533003 Cr-Commit-Position: refs/heads/master@{#45704}
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- 01 Jun, 2017 1 commit
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dusan.simicic authored
Add support for S1x4And, S1x4Or, S1x4Xor, S1x4Not, S1x4AnyTrue, S1x4AllTrue, S1x8And, S1x8Or, S1x8Xor, S1x8Not, S1x8AnyTrue, S1x8AllTrue, S1x16And, S1x16Or, S1x16Xor, S1x16Not, S1x16AnyTrue, S1x16AllTrue, SimdLoad, SimdStore operations for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2801683003 Cr-Commit-Position: refs/heads/master@{#45662}
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- 24 May, 2017 1 commit
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dusan.simicic authored
Add support for I8x16Add, I8x16AddSaturateS, I8x16Sub, I8x16SubSaturateS, I8x16Mul, I8x16MaxS, I8x16MinS, I8x16Eq, I8x16Ne, I8x16LtS, I8x16LeS, I8x16ShrU, I8x16AddSaturateU, I8x16SubSaturateU, I8x16MaxU, I8x16MinU, I8x16LtU, I8x16LeU, S128And, S128Or, S128Xor, S128Not for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2798853003 Cr-Commit-Position: refs/heads/master@{#45512}
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- 21 May, 2017 1 commit
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gdeepti authored
Currently SIMD integer comparison ops are implemented using Lt/Le, this is sub-optimal on Intel, because all compares are done using pcmpgt(d/w/b) that clobber the destination register, and will need additional instructions to when using Lt/Le as the base implementation. This CL proposes moving to Gt/Ge as the underlying implementation as this will only require swapping operands on MIPS and is consistent with x86/ARM instructions. BUG=v8:6020 R=bbudge@chromium.org, bmeurer@chromium.org, bradnelson@chromium.org Review-Url: https://codereview.chromium.org/2874403002 Cr-Commit-Position: refs/heads/master@{#45440}
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- 16 May, 2017 1 commit
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ivica.bogosavljevic authored
Reland d8bfdb7a Original commit message: If alignment parameter is set, the memory returned by the StackSlot operator will be aligned according to the parameter. The implementation goes like this. If alignment parameter is set we allocate a bit more memory than actually needed and so we can move the beginning of the StackSlot in order to have it aligned. BUG= Review-Url: https://codereview.chromium.org/2874713003 Cr-Commit-Position: refs/heads/master@{#45339}
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- 15 May, 2017 1 commit
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dusan.simicic authored
Add support for I16x8Mul, I16x8MaxS, I16x8MinS, I16x8Eq, I16x8Ne, I16x8LtS, I16x8LeS, I16x8AddSaturateU, I16x8SubSaturateU, I16x8MaxU, I16x8MinU, I16x8LtU, I16x8LeU, I8x16Splat, I8x16ExtractLane, I8x16ReplaceLane, I8x16Neg, I8x16Shl, I8x16ShrS, S16x8Select, S8x16Select for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2791213003 Cr-Commit-Position: refs/heads/master@{#45312}
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- 09 May, 2017 2 commits
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machenbach authored
Revert of [turbofan] Add alignment parameter to StackSlot operator (patchset #7 id:120001 of https://codereview.chromium.org/2816743003/ ) Reason for revert: Seems to break cfi: https://build.chromium.org/p/client.v8/builders/V8%20Linux64%20-%20cfi/builds/9989 Original issue's description: > [turbofan] Add alignment parameter to StackSlot operator > > If alignment parameter is set, the memory returned by the > StackSlot operator will be aligned according to the parameter. > > The implementation goes like this. If alignment parameter is set > we allocate a bit more memory than actually needed and so we > can move the beginning of the StackSlot in order to have it aligned. > > > BUG= > > Review-Url: https://codereview.chromium.org/2816743003 > Cr-Commit-Position: refs/heads/master@{#45197} > Committed: https://chromium.googlesource.com/v8/v8/+/d8bfdb7a998adadc56aa5705a5998e75ceae7675 TBR=ahaas@chromium.org,clemensh@chromium.org,titzer@chromium.org,bmeurer@chromium.org,ivica.bogosavljevic@imgtec.com # Skipping CQ checks because original CL landed less than 1 days ago. NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG= Review-Url: https://codereview.chromium.org/2867403002 Cr-Commit-Position: refs/heads/master@{#45203}
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ivica.bogosavljevic authored
If alignment parameter is set, the memory returned by the StackSlot operator will be aligned according to the parameter. The implementation goes like this. If alignment parameter is set we allocate a bit more memory than actually needed and so we can move the beginning of the StackSlot in order to have it aligned. BUG= Review-Url: https://codereview.chromium.org/2816743003 Cr-Commit-Position: refs/heads/master@{#45197}
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- 04 May, 2017 1 commit
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dusan.simicic authored
Add support for I32x4Neg, I32x4LtS, I32x4LeS, I32x4LtU, I32x4LeU, I16x8Splat, I16x8ExtractLane, I16x8ReplaceLane, I16x8Neg, I16x8Shl, I16x8ShrS, I16x8ShrU, I16x8Add, I16x8AddSaturateS, I16x8Sub, I16x8SubSaturateS for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2795143003 Cr-Commit-Position: refs/heads/master@{#45092}
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- 21 Apr, 2017 1 commit
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bbudge authored
These can be synthesized from existing operations and scheduled for better performance than if we have to generate blocks of instructions that take many cycles to complete. - Remove F32x4RecipRefine, F32x4RecipSqrtRefine. Clients are better off synthesizing these from splats, multiplies and adds. - Remove F32x4Div, F32x4Sqrt, F32x4MinNum, F32x4MaxNum. Clients are better off synthesizing these or using the reciprocal approximations, possibly with a refinement step. LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2827143002 Cr-Commit-Position: refs/heads/master@{#44784}
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- 12 Apr, 2017 1 commit
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dusan.simicic authored
Add support for F32x4Abs, F32x4Neg, F32x4RecipApprox, F32x4RecipRefine, F32x4RecipSqrtApprox, F32x4RecipSqrtRefine, F32x4Add, F32x4Sub, F32x4Mul, F32x4Max, F32x4Min, F32x4Eq, F32x4Ne, F32x4Lt, F32x4Le, I32x4SConvertF32x4, I32x4UConvertF32x4 operations for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2778203002 Cr-Commit-Position: refs/heads/master@{#44597}
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- 11 Apr, 2017 2 commits
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dusan.simicic authored
Add support for I32x4Mul, I32x4MaxS, I32x4MinS, I32x4Eq, I32x4Ne, I32x4Shl, I32x4ShrS, I32x4ShrU, I32x4MaxU, I32x4MinU, S32x4Select operations for mips32 and mips64 architectures BUG= Review-Url: https://codereview.chromium.org/2780713003 Cr-Commit-Position: refs/heads/master@{#44559}
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aseemgarg authored
BUG=v8:4614 R=binji@chromium.org,jarin@chromium.org Review-Url: https://codereview.chromium.org/2799863002 Cr-Commit-Position: refs/heads/master@{#44542}
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- 04 Apr, 2017 1 commit
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dusan.simicic authored
Add support for F32x4Splat, F32x4ExtractLane, F32x4ReplaceLane, F32x4SConvertI32x4, F32x4UConvertI32x4 operations for mips32 and mips64 architectures. BUG= Note: Depends on https://codereview.chromium.org/2753903004/ Review-Url: https://codereview.chromium.org/2780503002 Cr-Commit-Position: refs/heads/master@{#44359}
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- 03 Apr, 2017 1 commit
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dusan.simicic authored
Adds support for I32x4Splat, I32x4ExtractLane, I32x4ReplaceLane, I32x4Add, I32x4Sub, S128Zero operations for mips32 and mips64 architectures. BUG= Note: Depends on patch: https://codereview.chromium.org/2740123004/ Review-Url: https://codereview.chromium.org/2753903004 Cr-Commit-Position: refs/heads/master@{#44326}
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- 31 Mar, 2017 1 commit
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jyan authored
some arch like s390 has native instr can benefit from this. see ~10% improvement on MathAbs on s390 Review-Url: https://codereview.chromium.org/2785773002 Cr-Commit-Position: refs/heads/master@{#44310}
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- 16 Mar, 2017 1 commit
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aseemgarg authored
BUG=v8:4614 R=binji@chromium.org Review-Url: https://codereview.chromium.org/2649703002 Cr-Commit-Position: refs/heads/master@{#43878}
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- 13 Mar, 2017 1 commit
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Peter Marshall authored
Part of the performance and refactoring work to move the TypedArray constructors into CSA. This CL moves ConstructByArrayBuffer from JS to CSA. BUG=v8:5977 Change-Id: I0a200e6b3f6261ea2372ea9c3d3ca98e313cf2c5 Reviewed-on: https://chromium-review.googlesource.com/451620 Commit-Queue: Peter Marshall <petermarshall@chromium.org> Reviewed-by:
Benedikt Meurer <bmeurer@chromium.org> Cr-Commit-Position: refs/heads/master@{#43747}
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- 09 Mar, 2017 1 commit
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sreten.kovacevic authored
Port 040fa762 TEST=cctest/test-run-machops/Regression6046b BUG= Review-Url: https://codereview.chromium.org/2742773002 Cr-Commit-Position: refs/heads/master@{#43702}
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- 07 Mar, 2017 1 commit
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aseemgarg authored
BUG=v8:4614 R=binji@chromium.org Review-Url: https://codereview.chromium.org/2623633003 Cr-Commit-Position: refs/heads/master@{#43623}
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- 24 Feb, 2017 1 commit
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ivica.bogosavljevic authored
In instruction selector, in the reduction of Word64And(Word64Shr(val,0), 0xFFF...) to EXT instruction, the case where shift value is 0 and mask is 0xFFFFFFFFFFFFFFFF was not supported. We now generate NOP for this case since no bit extraction is necessary. We implement the same behavior for MIPS32 even though there are no tests that are failing. TEST=cctest/test-run-machops/Regression5951 BUG= Review-Url: https://codereview.chromium.org/2718433002 Cr-Commit-Position: refs/heads/master@{#43408}
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- 21 Feb, 2017 1 commit
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bbudge authored
- Adds new machine types SimdBool4/8/16 for the different boolean vector types. - Adds a kSimdMaskRegisters flag for each platform. These are all false for now. - Removes Create, ExtractLane, ReplaceLane, Equal, NotEqual, Swizzle and Shuffle opcodes from the Boolean types. These are unlikely to be well supported natively, and can be synthesized using Select. - Changes the signature of Relational opcodes to return boolean vectors. - Changes the signature of Select opcodes to take boolean vectors. - Updates the ARM implementation of Relational and Select opcodes. LOG=N BUG=v8:4124 Review-Url: https://codereview.chromium.org/2700813002 Cr-Commit-Position: refs/heads/master@{#43348}
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- 10 Feb, 2017 1 commit
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verwaest authored
BUG= Review-Url: https://codereview.chromium.org/2682143002 Cr-Original-Commit-Position: refs/heads/master@{#43065} Committed: https://chromium.googlesource.com/v8/v8/+/193a0c118845d068ab386b5c90d04daaa64e1e86 Review-Url: https://codereview.chromium.org/2682143002 Cr-Commit-Position: refs/heads/master@{#43085}
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- 09 Feb, 2017 2 commits
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machenbach authored
Revert of [compiler] Pass deoptimization_kind through DeoptimizeParameters and FlagsContinuation (patchset #3 id:40001 of https://codereview.chromium.org/2682143002/ ) Reason for revert: cfi failure: https://build.chromium.org/p/client.v8/builders/V8%20Linux64%20-%20cfi/builds/8635 Original issue's description: > [compiler] Pass deoptimization_kind through DeoptimizeParameters and FlagsContinuation > > BUG= > > Review-Url: https://codereview.chromium.org/2682143002 > Cr-Commit-Position: refs/heads/master@{#43065} > Committed: https://chromium.googlesource.com/v8/v8/+/193a0c118845d068ab386b5c90d04daaa64e1e86 TBR=jarin@chromium.org,verwaest@chromium.org # Skipping CQ checks because original CL landed less than 1 days ago. NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG= Review-Url: https://codereview.chromium.org/2683203002 Cr-Commit-Position: refs/heads/master@{#43070}
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verwaest authored
BUG= Review-Url: https://codereview.chromium.org/2682143002 Cr-Commit-Position: refs/heads/master@{#43065}
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