1. 10 Aug, 2020 1 commit
  2. 12 Aug, 2019 1 commit
  3. 28 May, 2019 1 commit
  4. 27 May, 2019 1 commit
    • Clemens Hammacher's avatar
      [cleanup] Replace simple typedefs by using · a335f2ae
      Clemens Hammacher authored
      This replaces all typedefs that define types and not functions by the
      equivalent "using" declaration.
      
      This was done mostly automatically using this command:
      ag -l '\btypedef\b' src test | xargs -L1 \
           perl -i -p0e 's/typedef ([^*;{}]+) (\w+);/using \2 = \1;/sg'
      
      Patchset 2 then adds some manual changes for typedefs for pointer types,
      where the regular expression did not match.
      
      R=mstarzinger@chromium.org
      TBR=yangguo@chromium.org, jarin@chromium.org
      
      Bug: v8:9183
      Change-Id: I6f6ee28d1793b7ac34a58f980b94babc21874b78
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1631409
      Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
      Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#61849}
      a335f2ae
  5. 23 May, 2019 1 commit
  6. 08 Mar, 2019 1 commit
  7. 18 Feb, 2019 1 commit
  8. 12 Nov, 2018 1 commit
  9. 16 Oct, 2018 1 commit
  10. 14 Jun, 2018 1 commit
    • jgruber's avatar
      Fix stack check pattern matching for CSA code · 9ff644ae
      jgruber authored
      The stack check instruction sequence is pattern-matched in
      instruction-selector-{ia32,x64}.cc and replaced with its own specialized
      opcode, for which we later generate an efficient stack check in a single
      instruction.
      
      But this pattern matching has never worked for CSA-generated code. The
      matcher expected LoadStackPointer in the right operand and the external
      reference load in the left operand. CSA generated exactly vice-versa.
      
      This CL does a few things; it
      1. reverts the recent change to load the
      limit from smi roots:
      
      Revert "[csa] Load the stack limit from smi roots"
      This reverts commit 507c29c9.
      
      2. tweaks the CSA instruction sequence to output what the matcher
      expects.
      3. refactors stack check matching into a new StackCheckMatcher class.
      4. typifies CSA::PerformStackCheck as a drive-by.
      
      Bug: v8:6666,v8:7844
      Change-Id: I9bb879ac10bfe7187750c5f9e7834dc4accf28b5
      Reviewed-on: https://chromium-review.googlesource.com/1099068Reviewed-by: 's avatarLeszek Swirski <leszeks@chromium.org>
      Reviewed-by: 's avatarSigurd Schneider <sigurds@chromium.org>
      Reviewed-by: 's avatarJaroslav Sevcik <jarin@chromium.org>
      Commit-Queue: Jakob Gruber <jgruber@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#53737}
      9ff644ae
  11. 29 Jan, 2018 1 commit
  12. 15 Jan, 2018 1 commit
  13. 02 Dec, 2017 1 commit
    • Mathias Bynens's avatar
      Normalize casing of hexadecimal digits · 822be9b2
      Mathias Bynens authored
      This patch normalizes the casing of hexadecimal digits in escape
      sequences of the form `\xNN` and integer literals of the form
      `0xNNNN`.
      
      Previously, the V8 code base used an inconsistent mixture of uppercase
      and lowercase.
      
      Google’s C++ style guide uses uppercase in its examples:
      https://google.github.io/styleguide/cppguide.html#Non-ASCII_Characters
      
      Moreover, uppercase letters more clearly stand out from the lowercase
      `x` (or `u`) characters at the start, as well as lowercase letters
      elsewhere in strings.
      
      BUG=v8:7109
      TBR=marja@chromium.org,titzer@chromium.org,mtrofin@chromium.org,mstarzinger@chromium.org,rossberg@chromium.org,yangguo@chromium.org,mlippautz@chromium.org
      NOPRESUBMIT=true
      
      Cq-Include-Trybots: master.tryserver.blink:linux_trusty_blink_rel;master.tryserver.chromium.linux:linux_chromium_rel_ng
      Change-Id: I790e21c25d96ad5d95c8229724eb45d2aa9e22d6
      Reviewed-on: https://chromium-review.googlesource.com/804294
      Commit-Queue: Mathias Bynens <mathias@chromium.org>
      Reviewed-by: 's avatarJakob Kummerow <jkummerow@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#49810}
      822be9b2
  14. 13 Mar, 2017 1 commit
  15. 23 Feb, 2017 1 commit
  16. 18 Oct, 2016 1 commit
    • zhengxing.li's avatar
      [turbofan][X64] Movzxbl/Movsxbl/Movzxwl/Movsxwl also zero extend to 64bit. · 3145befb
      zhengxing.li authored
        movzxbl/movsxbl/movzxwl/movsxwl operations implicitly zero-extend to 64-bit on x64, So It's not necessary to generate a "movl" instruction to zero-extend.
      
        For example, movzxbl/movl instruction sequence occurs frequently in v8 interpreter bytecode handler.
        such as:
        kind = BYTECODE_HANDLER
        name = LdaSmi
        compiler = turbofan
        Instructions (size = 76)
        0x184870a3ce40 0 430fbe442601 movsxbl rax,[r14+r12*1+0x1]
        0x184870a3ce46 6 48c1e020 REX.W shlq rax, 32
        0x184870a3ce4a 10 498d5c2402 REX.W leaq rbx,[r12+0x2]
        0x184870a3ce4f 15 420fb61433 movzxbl rdx,[rbx+r14*1]
        0x184870a3ce54 20 8bd2 movl rdx,rdx          <---------------------- here is a redundant "movl"
        0x184870a3ce56 22 4883fa1e REX.W cmpq rdx,0x1e
        0x184870a3ce5a 26 0f8518000000 jnz 56 (0x184870a3ce78)
      
        This CL also referenced to CL #36038 (https://codereview.chromium.org/1950013003 ) for adding test cases.
      
      BUG=
      
      Review-Url: https://codereview.chromium.org/2427483002
      Cr-Commit-Position: refs/heads/master@{#40375}
      3145befb
  17. 18 Aug, 2016 1 commit
  18. 08 Aug, 2016 2 commits
  19. 05 Aug, 2016 2 commits
  20. 11 Dec, 2015 1 commit
  21. 10 Dec, 2015 1 commit
    • jarin's avatar
      [turbofan] Make MachineType a pair of enums. · bb2a830d
      jarin authored
      MachineType is now a class with two enum fields:
      - MachineRepresentation
      - MachineSemantic
      
      Both enums are usable on their own, and this change switches some places from using MachineType to use just MachineRepresentation. Most notably:
      - register allocator now uses just the representation.
      - Phi and Select nodes only refer to representations.
      
      Review URL: https://codereview.chromium.org/1513543003
      
      Cr-Commit-Position: refs/heads/master@{#32738}
      bb2a830d
  22. 29 Oct, 2015 1 commit
  23. 26 Oct, 2015 1 commit
    • rmcilroy's avatar
      [Interpreter] Add support for loading from / storing to outer context variables. · c0c214da
      rmcilroy authored
      Adds support for loading from and storing to outer context
      variables. Also adds support for declaring functions on contexts and
      locals. Finally, fixes a couple of issues with StaContextSlot where
      we weren't emitting the write barrier and therefore would crash in the
      GC.
      
      Also added code so that --print-bytecode will output the
      function name before the bytecodes, and replaces MachineType with StoreRepresentation in RawMachineAssembler::Store and updates tests.
      
      BUG=v8:4280
      LOG=N
      
      Review URL: https://codereview.chromium.org/1425633002
      
      Cr-Commit-Position: refs/heads/master@{#31584}
      c0c214da
  24. 11 Apr, 2015 1 commit
  25. 08 Apr, 2015 1 commit
  26. 07 Apr, 2015 1 commit
    • bmeurer's avatar
      [x64] Match -0 - x with sign bit flip. · a1b2c275
      bmeurer authored
      We can use xorps/xorpd on Intel CPUs to flip the sign bit. Ideally we'd
      use a RIP-relative 128-bit constant in the code object, as OCaml/GCC
      does, however that requires 128-bit alignment for code objects, which is
      not yet implemented. So for now we materialize the mask inline.
      
      R=dcarney@chromium.org
      
      Review URL: https://codereview.chromium.org/1046893002
      
      Cr-Commit-Position: refs/heads/master@{#27611}
      a1b2c275
  27. 30 Mar, 2015 1 commit
    • bmeurer's avatar
      [turbofan] Add backend support for float32 operations. · 8dad78cd
      bmeurer authored
      This adds the basics necessary to support float32 operations in TurboFan.
      The actual functionality required to detect safe float32 operations will
      be added based on this later. Therefore this does not affect production
      code except for some cleanup/refactoring.
      
      In detail, this patchset contains the following features:
      - Add support for float32 operations to arm, arm64, ia32 and x64
        backends.
      - Add float32 machine operators.
      - Add support for float32 constants to simplified lowering.
      - Handle float32 representation for phis in simplified lowering.
      
      In addition, contains the following (related) cleanups:
      - Fix/unify naming of backend instructions.
      - Use AVX comparisons when available.
      - Extend ArchOpcodeField to 9 bits (required for arm64).
      - Refactor some code duplication in instruction selectors.
      
      BUG=v8:3589
      LOG=n
      R=dcarney@chromium.org
      
      Review URL: https://codereview.chromium.org/1044793002
      
      Cr-Commit-Position: refs/heads/master@{#27509}
      8dad78cd
  28. 20 Mar, 2015 1 commit
  29. 09 Mar, 2015 1 commit
  30. 23 Feb, 2015 1 commit
  31. 19 Feb, 2015 1 commit
  32. 18 Feb, 2015 1 commit
  33. 05 Dec, 2014 1 commit
  34. 01 Dec, 2014 2 commits
  35. 24 Nov, 2014 1 commit
  36. 21 Nov, 2014 1 commit
  37. 20 Nov, 2014 1 commit