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Commit 8f20e60f authored by Clemens Hammacher's avatar Clemens Hammacher Committed by Commit Bot
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Revert "[Liftoff] Implement float rounding" 

This reverts commit 5ae8420c.

Reason for revert: Fails on non-sse machine: https://build.chromium.org/p/client.v8/builders/V8%20Linux64%20-%20debug/builds/21480

Original change's description:
> [Liftoff] Implement float rounding
> 
> This adds support for the four rounding operations on f32 and f64:
> f32.ceil, f32.floor, f32.trunc, f32.nearest_int, f64.ceil, f64.floor,
> f64.trunc, and f64.nearest_int.
> 
> R=​titzer@chromium.org
> 
> Bug: v8:6600
> Change-Id: I16ea91e26c3233af7a33bbb794cd4182f9d7cdb0
> Reviewed-on: https://chromium-review.googlesource.com/995894
> Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
> Reviewed-by: Ben Titzer <titzer@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#52377}

TBR=titzer@chromium.org,clemensh@chromium.org

Change-Id: Iefdeb088b84384f7bc5dc5de6917bc60e9b8292c
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: v8:6600
Reviewed-on: https://chromium-review.googlesource.com/997392Reviewed-by: 's avatarClemens Hammacher <clemensh@chromium.org>
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Cr-Commit-Position: refs/heads/master@{#52378}
parent 5ae8420c
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src/wasm/baseline/arm/liftoff-assembler-arm.h
View file @ 8f20e60f
......@@ -156,10 +156,6 @@ UNIMPLEMENTED_FP_BINOP(f32_mul)
UNIMPLEMENTED_FP_BINOP(f32_div)
UNIMPLEMENTED_FP_UNOP(f32_abs)
UNIMPLEMENTED_FP_UNOP(f32_neg)
UNIMPLEMENTED_FP_UNOP(f32_ceil)
UNIMPLEMENTED_FP_UNOP(f32_floor)
UNIMPLEMENTED_FP_UNOP(f32_trunc)
UNIMPLEMENTED_FP_UNOP(f32_nearest_int)
UNIMPLEMENTED_FP_UNOP(f32_sqrt)
UNIMPLEMENTED_FP_BINOP(f64_add)
UNIMPLEMENTED_FP_BINOP(f64_sub)
......@@ -167,10 +163,6 @@ UNIMPLEMENTED_FP_BINOP(f64_mul)
UNIMPLEMENTED_FP_BINOP(f64_div)
UNIMPLEMENTED_FP_UNOP(f64_abs)
UNIMPLEMENTED_FP_UNOP(f64_neg)
UNIMPLEMENTED_FP_UNOP(f64_ceil)
UNIMPLEMENTED_FP_UNOP(f64_floor)
UNIMPLEMENTED_FP_UNOP(f64_trunc)
UNIMPLEMENTED_FP_UNOP(f64_nearest_int)
UNIMPLEMENTED_FP_UNOP(f64_sqrt)
#undef UNIMPLEMENTED_GP_BINOP
......
src/wasm/baseline/arm64/liftoff-assembler-arm64.h
View file @ 8f20e60f
......@@ -156,10 +156,6 @@ UNIMPLEMENTED_FP_BINOP(f32_mul)
UNIMPLEMENTED_FP_BINOP(f32_div)
UNIMPLEMENTED_FP_UNOP(f32_abs)
UNIMPLEMENTED_FP_UNOP(f32_neg)
UNIMPLEMENTED_FP_UNOP(f32_ceil)
UNIMPLEMENTED_FP_UNOP(f32_floor)
UNIMPLEMENTED_FP_UNOP(f32_trunc)
UNIMPLEMENTED_FP_UNOP(f32_nearest_int)
UNIMPLEMENTED_FP_UNOP(f32_sqrt)
UNIMPLEMENTED_FP_BINOP(f64_add)
UNIMPLEMENTED_FP_BINOP(f64_sub)
......@@ -167,10 +163,6 @@ UNIMPLEMENTED_FP_BINOP(f64_mul)
UNIMPLEMENTED_FP_BINOP(f64_div)
UNIMPLEMENTED_FP_UNOP(f64_abs)
UNIMPLEMENTED_FP_UNOP(f64_neg)
UNIMPLEMENTED_FP_UNOP(f64_ceil)
UNIMPLEMENTED_FP_UNOP(f64_floor)
UNIMPLEMENTED_FP_UNOP(f64_trunc)
UNIMPLEMENTED_FP_UNOP(f64_nearest_int)
UNIMPLEMENTED_FP_UNOP(f64_sqrt)
#undef UNIMPLEMENTED_GP_BINOP
......
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
View file @ 8f20e60f
......@@ -734,31 +734,6 @@ void LiftoffAssembler::emit_f32_neg(DoubleRegister dst, DoubleRegister src) {
}
}
void LiftoffAssembler::emit_f32_ceil(DoubleRegister dst, DoubleRegister src) {
if (!CpuFeatures::IsSupported(SSE4_1)) return bailout("no sse4.1");
CpuFeatureScope feature(this, SSE4_1);
roundss(dst, src, kRoundUp);
}
void LiftoffAssembler::emit_f32_floor(DoubleRegister dst, DoubleRegister src) {
if (!CpuFeatures::IsSupported(SSE4_1)) return bailout("no sse4.1");
CpuFeatureScope feature(this, SSE4_1);
roundss(dst, src, kRoundDown);
}
void LiftoffAssembler::emit_f32_trunc(DoubleRegister dst, DoubleRegister src) {
if (!CpuFeatures::IsSupported(SSE4_1)) return bailout("no sse4.1");
CpuFeatureScope feature(this, SSE4_1);
roundss(dst, src, kRoundToZero);
}
void LiftoffAssembler::emit_f32_nearest_int(DoubleRegister dst,
DoubleRegister src) {
if (!CpuFeatures::IsSupported(SSE4_1)) return bailout("no sse4.1");
CpuFeatureScope feature(this, SSE4_1);
roundss(dst, src, kRoundToNearest);
}
void LiftoffAssembler::emit_f32_sqrt(DoubleRegister dst, DoubleRegister src) {
Sqrtss(dst, src);
}
......@@ -841,31 +816,6 @@ void LiftoffAssembler::emit_f64_neg(DoubleRegister dst, DoubleRegister src) {
}
}
void LiftoffAssembler::emit_f64_ceil(DoubleRegister dst, DoubleRegister src) {
if (!CpuFeatures::IsSupported(SSE4_1)) return bailout("no sse4.1");
CpuFeatureScope feature(this, SSE4_1);
roundsd(dst, src, kRoundUp);
}
void LiftoffAssembler::emit_f64_floor(DoubleRegister dst, DoubleRegister src) {
if (!CpuFeatures::IsSupported(SSE4_1)) return bailout("no sse4.1");
CpuFeatureScope feature(this, SSE4_1);
roundsd(dst, src, kRoundDown);
}
void LiftoffAssembler::emit_f64_trunc(DoubleRegister dst, DoubleRegister src) {
if (!CpuFeatures::IsSupported(SSE4_1)) return bailout("no sse4.1");
CpuFeatureScope feature(this, SSE4_1);
roundsd(dst, src, kRoundToZero);
}
void LiftoffAssembler::emit_f64_nearest_int(DoubleRegister dst,
DoubleRegister src) {
if (!CpuFeatures::IsSupported(SSE4_1)) return bailout("no sse4.1");
CpuFeatureScope feature(this, SSE4_1);
roundsd(dst, src, kRoundToNearest);
}
void LiftoffAssembler::emit_f64_sqrt(DoubleRegister dst, DoubleRegister src) {
Sqrtsd(dst, src);
}
......
src/wasm/baseline/liftoff-assembler.h
View file @ 8f20e60f
......@@ -429,10 +429,6 @@ class LiftoffAssembler : public TurboAssembler {
// f32 unops.
inline void emit_f32_abs(DoubleRegister dst, DoubleRegister src);
inline void emit_f32_neg(DoubleRegister dst, DoubleRegister src);
inline void emit_f32_ceil(DoubleRegister dst, DoubleRegister src);
inline void emit_f32_floor(DoubleRegister dst, DoubleRegister src);
inline void emit_f32_trunc(DoubleRegister dst, DoubleRegister src);
inline void emit_f32_nearest_int(DoubleRegister dst, DoubleRegister src);
inline void emit_f32_sqrt(DoubleRegister dst, DoubleRegister src);
// f64 binops.
......@@ -448,10 +444,6 @@ class LiftoffAssembler : public TurboAssembler {
// f64 unops.
inline void emit_f64_abs(DoubleRegister dst, DoubleRegister src);
inline void emit_f64_neg(DoubleRegister dst, DoubleRegister src);
inline void emit_f64_ceil(DoubleRegister dst, DoubleRegister src);
inline void emit_f64_floor(DoubleRegister dst, DoubleRegister src);
inline void emit_f64_trunc(DoubleRegister dst, DoubleRegister src);
inline void emit_f64_nearest_int(DoubleRegister dst, DoubleRegister src);
inline void emit_f64_sqrt(DoubleRegister dst, DoubleRegister src);
// type conversions.
......
src/wasm/baseline/liftoff-compiler.cc
View file @ 8f20e60f
......@@ -625,17 +625,9 @@ class LiftoffCompiler {
CASE_I32_UNOP(I32Ctz, i32_ctz)
CASE_FLOAT_UNOP(F32Abs, F32, f32_abs)
CASE_FLOAT_UNOP(F32Neg, F32, f32_neg)
CASE_FLOAT_UNOP(F32Ceil, F32, f32_ceil)
CASE_FLOAT_UNOP(F32Floor, F32, f32_floor)
CASE_FLOAT_UNOP(F32Trunc, F32, f32_trunc)
CASE_FLOAT_UNOP(F32NearestInt, F32, f32_nearest_int)
CASE_FLOAT_UNOP(F32Sqrt, F32, f32_sqrt)
CASE_FLOAT_UNOP(F64Abs, F64, f64_abs)
CASE_FLOAT_UNOP(F64Neg, F64, f64_neg)
CASE_FLOAT_UNOP(F64Ceil, F64, f64_ceil)
CASE_FLOAT_UNOP(F64Floor, F64, f64_floor)
CASE_FLOAT_UNOP(F64Trunc, F64, f64_trunc)
CASE_FLOAT_UNOP(F64NearestInt, F64, f64_nearest_int)
CASE_FLOAT_UNOP(F64Sqrt, F64, f64_sqrt)
CASE_TYPE_CONVERSION(I32ConvertI64, I32, I64, nullptr)
CASE_TYPE_CONVERSION(I32ReinterpretF32, I32, F32, nullptr)
......
src/wasm/baseline/mips/liftoff-assembler-mips.h
View file @ 8f20e60f
......@@ -528,10 +528,6 @@ FP_BINOP(f32_mul, mul_s)
FP_BINOP(f32_div, div_s)
FP_UNOP(f32_abs, abs_s)
FP_UNOP(f32_neg, neg_s)
FP_UNOP(f32_ceil, ceil_w_s)
FP_UNOP(f32_floor, floor_w_s)
FP_UNOP(f32_trunc, trunc_w_s)
FP_UNOP(f32_nearest_int, rint_s)
FP_UNOP(f32_sqrt, sqrt_s)
FP_BINOP(f64_add, add_d)
FP_BINOP(f64_sub, sub_d)
......@@ -539,10 +535,6 @@ FP_BINOP(f64_mul, mul_d)
FP_BINOP(f64_div, div_d)
FP_UNOP(f64_abs, abs_d)
FP_UNOP(f64_neg, neg_d)
FP_UNOP(f64_ceil, ceil_w_d)
FP_UNOP(f64_floor, floor_w_d)
FP_UNOP(f64_trunc, trunc_w_d)
FP_UNOP(f64_nearest_int, rint_d)
FP_UNOP(f64_sqrt, sqrt_d)
#undef FP_BINOP
......
src/wasm/baseline/mips64/liftoff-assembler-mips64.h
View file @ 8f20e60f
......@@ -421,10 +421,6 @@ FP_BINOP(f32_mul, mul_s)
FP_BINOP(f32_div, div_s)
FP_UNOP(f32_abs, abs_s)
FP_UNOP(f32_neg, neg_s)
FP_UNOP(f32_ceil, ceil_w_s)
FP_UNOP(f32_floor, floor_w_s)
FP_UNOP(f32_trunc, trunc_w_s)
FP_UNOP(f32_nearest_int, rint_s)
FP_UNOP(f32_sqrt, sqrt_s)
FP_BINOP(f64_add, add_d)
FP_BINOP(f64_sub, sub_d)
......@@ -432,10 +428,6 @@ FP_BINOP(f64_mul, mul_d)
FP_BINOP(f64_div, div_d)
FP_UNOP(f64_abs, abs_d)
FP_UNOP(f64_neg, neg_d)
FP_UNOP(f64_ceil, ceil_w_d)
FP_UNOP(f64_floor, floor_w_d)
FP_UNOP(f64_trunc, trunc_w_d)
FP_UNOP(f64_nearest_int, rint_d)
FP_UNOP(f64_sqrt, sqrt_d)
#undef FP_BINOP
......
src/wasm/baseline/ppc/liftoff-assembler-ppc.h
View file @ 8f20e60f
......@@ -156,10 +156,6 @@ UNIMPLEMENTED_FP_BINOP(f32_mul)
UNIMPLEMENTED_FP_BINOP(f32_div)
UNIMPLEMENTED_FP_UNOP(f32_abs)
UNIMPLEMENTED_FP_UNOP(f32_neg)
UNIMPLEMENTED_FP_UNOP(f32_ceil)
UNIMPLEMENTED_FP_UNOP(f32_floor)
UNIMPLEMENTED_FP_UNOP(f32_trunc)
UNIMPLEMENTED_FP_UNOP(f32_nearest_int)
UNIMPLEMENTED_FP_UNOP(f32_sqrt)
UNIMPLEMENTED_FP_BINOP(f64_add)
UNIMPLEMENTED_FP_BINOP(f64_sub)
......@@ -167,10 +163,6 @@ UNIMPLEMENTED_FP_BINOP(f64_mul)
UNIMPLEMENTED_FP_BINOP(f64_div)
UNIMPLEMENTED_FP_UNOP(f64_abs)
UNIMPLEMENTED_FP_UNOP(f64_neg)
UNIMPLEMENTED_FP_UNOP(f64_ceil)
UNIMPLEMENTED_FP_UNOP(f64_floor)
UNIMPLEMENTED_FP_UNOP(f64_trunc)
UNIMPLEMENTED_FP_UNOP(f64_nearest_int)
UNIMPLEMENTED_FP_UNOP(f64_sqrt)
#undef UNIMPLEMENTED_GP_BINOP
......
src/wasm/baseline/s390/liftoff-assembler-s390.h
View file @ 8f20e60f
......@@ -156,10 +156,6 @@ UNIMPLEMENTED_FP_BINOP(f32_mul)
UNIMPLEMENTED_FP_BINOP(f32_div)
UNIMPLEMENTED_FP_UNOP(f32_abs)
UNIMPLEMENTED_FP_UNOP(f32_neg)
UNIMPLEMENTED_FP_UNOP(f32_ceil)
UNIMPLEMENTED_FP_UNOP(f32_floor)
UNIMPLEMENTED_FP_UNOP(f32_trunc)
UNIMPLEMENTED_FP_UNOP(f32_nearest_int)
UNIMPLEMENTED_FP_UNOP(f32_sqrt)
UNIMPLEMENTED_FP_BINOP(f64_add)
UNIMPLEMENTED_FP_BINOP(f64_sub)
......@@ -167,10 +163,6 @@ UNIMPLEMENTED_FP_BINOP(f64_mul)
UNIMPLEMENTED_FP_BINOP(f64_div)
UNIMPLEMENTED_FP_UNOP(f64_abs)
UNIMPLEMENTED_FP_UNOP(f64_neg)
UNIMPLEMENTED_FP_UNOP(f64_ceil)
UNIMPLEMENTED_FP_UNOP(f64_floor)
UNIMPLEMENTED_FP_UNOP(f64_trunc)
UNIMPLEMENTED_FP_UNOP(f64_nearest_int)
UNIMPLEMENTED_FP_UNOP(f64_sqrt)
#undef UNIMPLEMENTED_GP_BINOP
......
src/wasm/baseline/x64/liftoff-assembler-x64.h
View file @ 8f20e60f
......@@ -613,23 +613,6 @@ void LiftoffAssembler::emit_f32_neg(DoubleRegister dst, DoubleRegister src) {
}
}
void LiftoffAssembler::emit_f32_ceil(DoubleRegister dst, DoubleRegister src) {
Roundss(dst, src, kRoundUp);
}
void LiftoffAssembler::emit_f32_floor(DoubleRegister dst, DoubleRegister src) {
Roundss(dst, src, kRoundDown);
}
void LiftoffAssembler::emit_f32_trunc(DoubleRegister dst, DoubleRegister src) {
Roundss(dst, src, kRoundToZero);
}
void LiftoffAssembler::emit_f32_nearest_int(DoubleRegister dst,
DoubleRegister src) {
Roundss(dst, src, kRoundToNearest);
}
void LiftoffAssembler::emit_f32_sqrt(DoubleRegister dst, DoubleRegister src) {
Sqrtss(dst, src);
}
......@@ -712,23 +695,6 @@ void LiftoffAssembler::emit_f64_neg(DoubleRegister dst, DoubleRegister src) {
}
}
void LiftoffAssembler::emit_f64_ceil(DoubleRegister dst, DoubleRegister src) {
Roundsd(dst, src, kRoundUp);
}
void LiftoffAssembler::emit_f64_floor(DoubleRegister dst, DoubleRegister src) {
Roundsd(dst, src, kRoundDown);
}
void LiftoffAssembler::emit_f64_trunc(DoubleRegister dst, DoubleRegister src) {
Roundsd(dst, src, kRoundToZero);
}
void LiftoffAssembler::emit_f64_nearest_int(DoubleRegister dst,
DoubleRegister src) {
Roundsd(dst, src, kRoundToNearest);
}
void LiftoffAssembler::emit_f64_sqrt(DoubleRegister dst, DoubleRegister src) {
Sqrtsd(dst, src);
}
......
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