In instruction selector, in the reduction of Word64And(Word64Shr(val,0),
0xFFF...) to EXT instruction, the case where shift value is 0 and mask is
0xFFFFFFFFFFFFFFFF was not supported. We now generate NOP for this case
since no bit extraction is necessary.
We implement the same behavior for MIPS32 even though there are no tests
that are failing.

TEST=cctest/test-run-machops/Regression5951
BUG=

Review-Url: https://codereview.chromium.org/2718433002
Cr-Commit-Position: refs/heads/master@{#43408}