cpu-mips64.cc 1.21 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
// Copyright 2012 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

// CPU specific code for arm independent of OS goes here.

#include <sys/syscall.h>
#include <unistd.h>

#ifdef __mips
#include <asm/cachectl.h>
#endif  // #ifdef __mips

#if V8_TARGET_ARCH_MIPS64

16
#include "src/codegen/cpu-features.h"
17 18 19 20 21

namespace v8 {
namespace internal {

void CpuFeatures::FlushICache(void* start, size_t size) {
22
#if !defined(USE_SIMULATOR)
23 24 25 26 27 28 29
  // Nothing to do, flushing no instructions.
  if (size == 0) {
    return;
  }

#if defined(ANDROID) && !defined(__LP64__)
  // Bionic cacheflush can typically run in userland, avoiding kernel call.
30 31 32 33
  char* end = reinterpret_cast<char*>(start) + size;
  cacheflush(reinterpret_cast<intptr_t>(start), reinterpret_cast<intptr_t>(end),
             0);
#else   // ANDROID
34
  long res;  // NOLINT(runtime/int)
35 36
  // See http://www.linux-mips.org/wiki/Cacheflush_Syscall.
  res = syscall(__NR_cacheflush, start, size, ICACHE);
37
  if (res) FATAL("Failed to flush the instruction cache");
38
#endif  // ANDROID
39
#endif  // !USE_SIMULATOR.
40 41
}

42 43
}  // namespace internal
}  // namespace v8
44 45

#endif  // V8_TARGET_ARCH_MIPS64