cpu-mips.cc 1.22 KB
Newer Older
1
// Copyright 2012 the V8 project authors. All rights reserved.
2 3
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
4 5 6 7 8 9 10 11 12 13

// CPU specific code for arm independent of OS goes here.

#include <sys/syscall.h>
#include <unistd.h>

#ifdef __mips
#include <asm/cachectl.h>
#endif  // #ifdef __mips

14
#if V8_TARGET_ARCH_MIPS
15

16
#include "src/assembler.h"
17
#include "src/macro-assembler.h"
18

19
#include "src/simulator.h"  // For cache flushing.
20 21 22 23

namespace v8 {
namespace internal {

24

25
void CpuFeatures::FlushICache(void* start, size_t size) {
26
#if !defined(USE_SIMULATOR)
27 28 29 30 31
  // Nothing to do, flushing no instructions.
  if (size == 0) {
    return;
  }

32 33 34 35 36 37
#if defined(ANDROID)
  // Bionic cacheflush can typically run in userland, avoiding kernel call.
  char *end = reinterpret_cast<char *>(start) + size;
  cacheflush(
    reinterpret_cast<intptr_t>(start), reinterpret_cast<intptr_t>(end), 0);
#else  // ANDROID
38
  int res;
39
  // See http://www.linux-mips.org/wiki/Cacheflush_Syscall.
40
  res = syscall(__NR_cacheflush, start, size, ICACHE);
41
  if (res) FATAL("Failed to flush the instruction cache");
42
#endif  // ANDROID
43
#endif  // !USE_SIMULATOR.
44 45
}

46 47
}  // namespace internal
}  // namespace v8
48

49
#endif  // V8_TARGET_ARCH_MIPS