simulator-ppc.h 12.2 KB
Newer Older
1 2 3 4 5 6 7
// Copyright 2014 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

// Declares a Simulator for PPC instructions if we are not generating a native
// PPC binary. This Simulator allows us to run and debug PPC code generation on
// regular desktop machines.
8
// V8 calls into generated code via the GeneratedCode wrapper,
9 10 11
// which will start execution in the Simulator or forwards to the real entry
// on a PPC HW platform.

12 13
#ifndef V8_EXECUTION_PPC_SIMULATOR_PPC_H_
#define V8_EXECUTION_PPC_SIMULATOR_PPC_H_
14

15
// globals.h defines USE_SIMULATOR.
16
#include "src/common/globals.h"
17

18
#if defined(USE_SIMULATOR)
19 20
// Running with a simulator.

21 22
#include "src/base/lazy-instance.h"
#include "src/base/platform/mutex.h"
23
#include "src/utils/allocation.h"
24

lpy's avatar
lpy committed
25
#include "src/base/hashmap.h"
26
#include "src/codegen/assembler.h"
27
#include "src/codegen/ppc/constants-ppc.h"
28
#include "src/execution/simulator-base.h"
29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58

namespace v8 {
namespace internal {

class CachePage {
 public:
  static const int LINE_VALID = 0;
  static const int LINE_INVALID = 1;

  static const int kPageShift = 12;
  static const int kPageSize = 1 << kPageShift;
  static const int kPageMask = kPageSize - 1;
  static const int kLineShift = 2;  // The cache line is only 4 bytes right now.
  static const int kLineLength = 1 << kLineShift;
  static const int kLineMask = kLineLength - 1;

  CachePage() { memset(&validity_map_, LINE_INVALID, sizeof(validity_map_)); }

  char* ValidityByte(int offset) {
    return &validity_map_[offset >> kLineShift];
  }

  char* CachedData(int offset) { return &data_[offset]; }

 private:
  char data_[kPageSize];  // The cached data.
  static const int kValidityMapSize = kPageSize >> kLineShift;
  char validity_map_[kValidityMapSize];  // One byte per line.
};

59
class Simulator : public SimulatorBase {
60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
 public:
  friend class PPCDebugger;
  enum Register {
    no_reg = -1,
    r0 = 0,
    sp,
    r2,
    r3,
    r4,
    r5,
    r6,
    r7,
    r8,
    r9,
    r10,
    r11,
    r12,
    r13,
    r14,
    r15,
    r16,
    r17,
    r18,
    r19,
    r20,
    r21,
    r22,
    r23,
    r24,
    r25,
    r26,
    r27,
    r28,
    r29,
    r30,
    fp,
    kNumGPRs = 32,
    d0 = 0,
    d1,
    d2,
    d3,
    d4,
    d5,
    d6,
    d7,
    d8,
    d9,
    d10,
    d11,
    d12,
    d13,
    d14,
    d15,
    d16,
    d17,
    d18,
    d19,
    d20,
    d21,
    d22,
    d23,
    d24,
    d25,
    d26,
    d27,
    d28,
    d29,
    d30,
    d31,
    kNumFPRs = 32
  };

  explicit Simulator(Isolate* isolate);
  ~Simulator();

  // The currently executing Simulator instance. Potentially there can be one
  // for each native thread.
  static Simulator* current(v8::internal::Isolate* isolate);

  // Accessors for register state.
  void set_register(int reg, intptr_t value);
  intptr_t get_register(int reg) const;
  double get_double_from_register_pair(int reg);
  void set_d_register_from_double(int dreg, const double dbl) {
    DCHECK(dreg >= 0 && dreg < kNumFPRs);
145 146 147 148 149 150 151 152 153 154 155 156 157
    *bit_cast<double*>(&fp_registers_[dreg]) = dbl;
  }
  double get_double_from_d_register(int dreg) {
    DCHECK(dreg >= 0 && dreg < kNumFPRs);
    return *bit_cast<double*>(&fp_registers_[dreg]);
  }
  void set_d_register(int dreg, int64_t value) {
    DCHECK(dreg >= 0 && dreg < kNumFPRs);
    fp_registers_[dreg] = value;
  }
  int64_t get_d_register(int dreg) {
    DCHECK(dreg >= 0 && dreg < kNumFPRs);
    return fp_registers_[dreg];
158 159 160 161 162 163
  }

  // Special case of set_register and get_register to access the raw PC value.
  void set_pc(intptr_t value);
  intptr_t get_pc() const;

164
  Address get_sp() const { return static_cast<Address>(get_register(sp)); }
165

166 167 168
  // Accessor to the internal Link Register
  intptr_t get_lr() const;

169
  // Accessor to the internal simulator stack area.
170
  uintptr_t StackLimit(uintptr_t c_limit) const;
171 172 173 174

  // Executes PPC instructions until the PC reaches end_sim_pc.
  void Execute();

175
  template <typename Return, typename... Args>
176
  Return Call(Address entry, Args... args) {
177 178 179
    return VariadicCall<Return>(this, &Simulator::CallImpl, entry, args...);
  }

180
  // Alternative: call a 2-argument double function.
181 182 183
  void CallFP(Address entry, double d0, double d1);
  int32_t CallFPReturnsInt(Address entry, double d0, double d1);
  double CallFPReturnsDouble(Address entry, double d0, double d1);
184 185 186 187 188 189 190 191 192 193 194

  // Push an address onto the JS stack.
  uintptr_t PushAddress(uintptr_t address);

  // Pop an address from the JS stack.
  uintptr_t PopAddress();

  // Debugger input.
  void set_last_debugger_input(char* input);
  char* last_debugger_input() { return last_debugger_input_; }

195 196 197
  // Redirection support.
  static void SetRedirectInstruction(Instruction* instruction);

198
  // ICache checking.
199
  static bool ICacheMatch(void* one, void* two);
200 201
  static void FlushICache(base::CustomMatcherHashMap* i_cache, void* start,
                          size_t size);
202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218

  // Returns true if pc register contains one of the 'special_values' defined
  // below (bad_lr, end_sim_pc).
  bool has_bad_pc() const;

 private:
  enum special_values {
    // Known bad pc value to ensure that the simulator does not execute
    // without being properly setup.
    bad_lr = -1,
    // A pc value used to signal the simulator to stop execution.  Generally
    // the lr is set to this value on transition from native C code to
    // simulated execution, so that the simulator can "return" to the native
    // C code.
    end_sim_pc = -2
  };

219 220
  intptr_t CallImpl(Address entry, int argument_count,
                    const intptr_t* arguments);
221

222 223
  enum BCType { BC_OFFSET, BC_LINK_REG, BC_CTR_REG };

224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240
  // Unsupported instructions use Format to print an error and stop execution.
  void Format(Instruction* instr, const char* format);

  // Helper functions to set the conditional flags in the architecture state.
  bool CarryFrom(int32_t left, int32_t right, int32_t carry = 0);
  bool BorrowFrom(int32_t left, int32_t right);
  bool OverflowFrom(int32_t alu_out, int32_t left, int32_t right,
                    bool addition);

  // Helper functions to decode common "addressing" modes
  int32_t GetShiftRm(Instruction* instr, bool* carry_out);
  int32_t GetImm(Instruction* instr, bool* carry_out);
  void ProcessPUW(Instruction* instr, int num_regs, int operand_size,
                  intptr_t* start_address, intptr_t* end_address);
  void HandleRList(Instruction* instr, bool load);
  void HandleVList(Instruction* inst);
  void SoftwareInterrupt(Instruction* instr);
241
  void DebugAtNextPC();
242 243 244 245 246 247 248 249 250 251 252

  // Stop helper functions.
  inline bool isStopInstruction(Instruction* instr);
  inline bool isWatchedStop(uint32_t bkpt_code);
  inline bool isEnabledStop(uint32_t bkpt_code);
  inline void EnableStop(uint32_t bkpt_code);
  inline void DisableStop(uint32_t bkpt_code);
  inline void IncreaseStopCounter(uint32_t bkpt_code);
  void PrintStopInfo(uint32_t code);

  // Read and write memory.
253 254
  template <typename T>
  inline void Read(uintptr_t address, T* value) {
255
    base::MutexGuard lock_guard(&GlobalMonitor::Get()->mutex);
256 257 258 259 260
    memcpy(value, reinterpret_cast<const char*>(address), sizeof(T));
  }

  template <typename T>
  inline void ReadEx(uintptr_t address, T* value) {
261 262
    base::MutexGuard lock_guard(&GlobalMonitor::Get()->mutex);
    GlobalMonitor::Get()->NotifyLoadExcl(
263 264 265 266 267 268 269
        address, static_cast<TransactionSize>(sizeof(T)),
        isolate_->thread_id());
    memcpy(value, reinterpret_cast<const char*>(address), sizeof(T));
  }

  template <typename T>
  inline void Write(uintptr_t address, T value) {
270 271 272 273
    base::MutexGuard lock_guard(&GlobalMonitor::Get()->mutex);
    GlobalMonitor::Get()->NotifyStore(address,
                                      static_cast<TransactionSize>(sizeof(T)),
                                      isolate_->thread_id());
274 275 276 277 278
    memcpy(reinterpret_cast<char*>(address), &value, sizeof(T));
  }

  template <typename T>
  inline int32_t WriteEx(uintptr_t address, T value) {
279 280
    base::MutexGuard lock_guard(&GlobalMonitor::Get()->mutex);
    if (GlobalMonitor::Get()->NotifyStoreExcl(
281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301
            address, static_cast<TransactionSize>(sizeof(T)),
            isolate_->thread_id())) {
      memcpy(reinterpret_cast<char*>(address), &value, sizeof(T));
      return 0;
    } else {
      return 1;
    }
  }

#define RW_VAR_LIST(V) \
  V(DWU, uint64_t)     \
  V(DW, int64_t)       \
  V(WU, uint32_t)      \
  V(W, int32_t) V(HU, uint16_t) V(H, int16_t) V(BU, uint8_t) V(B, int8_t)

#define GENERATE_RW_FUNC(size, type)                   \
  inline type Read##size(uintptr_t addr);              \
  inline type ReadEx##size(uintptr_t addr);            \
  inline void Write##size(uintptr_t addr, type value); \
  inline int32_t WriteEx##size(uintptr_t addr, type value);

302
  RW_VAR_LIST(GENERATE_RW_FUNC)
303
#undef GENERATE_RW_FUNC
304 305 306

  void Trace(Instruction* instr);
  void SetCR0(intptr_t result, bool setSO = false);
307
  void ExecuteBranchConditional(Instruction* instr, BCType type);
308 309
  void ExecuteGeneric(Instruction* instr);

310 311 312
  void SetFPSCR(int bit) { fp_condition_reg_ |= (1 << (31 - bit)); }
  void ClearFPSCR(int bit) { fp_condition_reg_ &= ~(1 << (31 - bit)); }

313 314 315 316
  // Executes one instruction.
  void ExecuteInstruction(Instruction* instr);

  // ICache.
317 318 319 320 321 322
  static void CheckICache(base::CustomMatcherHashMap* i_cache,
                          Instruction* instr);
  static void FlushOnePage(base::CustomMatcherHashMap* i_cache, intptr_t start,
                           int size);
  static CachePage* GetCachePage(base::CustomMatcherHashMap* i_cache,
                                 void* page);
323 324 325 326 327 328

  // Handle arguments and return value for runtime FP functions.
  void GetFpArgs(double* x, double* y, intptr_t* z);
  void SetFpResult(const double& result);
  void TrashCallerSaveRegisters();

329
  void CallInternal(Address entry);
330 331 332 333 334 335 336 337 338 339 340 341 342

  // Architecture state.
  // Saturating instructions require a Q flag to indicate saturation.
  // There is currently no way to read the CPSR directly, and thus read the Q
  // flag, so this is left unimplemented.
  intptr_t registers_[kNumGPRs];
  int32_t condition_reg_;
  int32_t fp_condition_reg_;
  intptr_t special_reg_lr_;
  intptr_t special_reg_pc_;
  intptr_t special_reg_ctr_;
  int32_t special_reg_xer_;

343
  int64_t fp_registers_[kNumFPRs];
344 345 346

  // Simulator support.
  char* stack_;
347
  static const size_t stack_protection_size_ = 256 * kSystemPointerSize;
348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375
  bool pc_modified_;
  int icount_;

  // Debugger input.
  char* last_debugger_input_;

  // Registered breakpoints.
  Instruction* break_pc_;
  Instr break_instr_;

  v8::internal::Isolate* isolate_;

  // A stop is watched if its code is less than kNumOfWatchedStops.
  // Only watched stops support enabling/disabling and the counter feature.
  static const uint32_t kNumOfWatchedStops = 256;

  // Breakpoint is disabled if bit 31 is set.
  static const uint32_t kStopDisabledBit = 1 << 31;

  // A stop is enabled, meaning the simulator will stop when meeting the
  // instruction, if bit 31 of watched_stops_[code].count is unset.
  // The value watched_stops_[code].count & ~(1 << 31) indicates how many times
  // the breakpoint was hit or gone through.
  struct StopCountAndDesc {
    uint32_t count;
    char* desc;
  };
  StopCountAndDesc watched_stops_[kNumOfWatchedStops];
376

377
  // Synchronization primitives. See ARM DDI 0406C.b, A2.9.
378 379 380 381 382 383 384 385 386 387
  enum class MonitorAccess {
    Open,
    Exclusive,
  };

  enum class TransactionSize {
    None = 0,
    Byte = 1,
    HalfWord = 2,
    Word = 4,
388
    DWord = 8,
389 390 391 392 393 394 395
  };

  class GlobalMonitor {
   public:
    // Exposed so it can be accessed by Simulator::{Read,Write}Ex*.
    base::Mutex mutex;

396 397 398 399 400
    void NotifyLoadExcl(uintptr_t addr, TransactionSize size,
                        ThreadId thread_id);
    void NotifyStore(uintptr_t addr, TransactionSize size, ThreadId thread_id);
    bool NotifyStoreExcl(uintptr_t addr, TransactionSize size,
                         ThreadId thread_id);
401

402 403
    static GlobalMonitor* Get();

404
   private:
405 406 407 408
    // Private constructor. Call {GlobalMonitor::Get()} to get the singleton.
    GlobalMonitor() = default;
    friend class base::LeakyObject<GlobalMonitor>;

409
    void Clear();
410

411 412 413 414
    MonitorAccess access_state_ = MonitorAccess::Open;
    uintptr_t tagged_addr_ = 0;
    TransactionSize size_ = TransactionSize::None;
    ThreadId thread_id_ = ThreadId::Invalid();
415
  };
416 417
};

418 419
}  // namespace internal
}  // namespace v8
420

421
#endif  // defined(USE_SIMULATOR)
422
#endif  // V8_EXECUTION_PPC_SIMULATOR_PPC_H_