1. 28 Feb, 2014 1 commit
    • Christophe Gisquet's avatar
      dcadec: simplify decoding of VQ high frequencies · 4cb69642
      Christophe Gisquet authored
      The vector dequantization has a test in a loop preventing effective SIMD
      implementation. By moving it out of the loop, this loop can be DSPized.
      
      Therefore, modify the current DSP implementation. In particular, the
      DSP implementation no longer has to handle null loop sizes.
      
      The decode_hf implementations have following timings:
      
      For x86 Arrandale:
              C  SSE SSE2 SSE4
      win32: 260 162  119  104
      win64: 242 N/A   89   72
      
      The arm NEON optimizations follow in a later patch as external asm. The
      now unused check for the y modifier in arm inline asm is removed from
      configure.
      4cb69642
  2. 08 Feb, 2014 1 commit
  3. 07 Feb, 2014 1 commit
    • Christophe Gisquet's avatar
      dcadsp: add int8x8_fmul_int32 to dsp context · 2bd44cb7
      Christophe Gisquet authored
      It is currently declared as a macro who is set to inlinable functions,
      among which a Neon and a default C implementations.
      
      Add a DSP parameter to each inline function, unused except by the
      default C implementation which calls a function from the DSP context.
      
      On an Arrandale CPU, gain for an inlined SSE2 function vs. a call:
      - Win32: 29 to 26 cycles
      - Win64: 25 to 23 cycles
      Signed-off-by: 's avatarJanne Grunau <janne-libav@jannau.net>
      2bd44cb7
  4. 17 Jul, 2013 1 commit
  5. 25 Feb, 2013 1 commit
  6. 07 Dec, 2012 1 commit
  7. 15 Dec, 2011 1 commit
  8. 25 Nov, 2011 1 commit
  9. 03 Oct, 2011 1 commit
  10. 30 Sep, 2011 1 commit