Port e47f9a9d

Original Commit Message:

    The set of registers to spill was wrong. Instead of spilling wasm
    parameter registers (like the WasmCompileLazy builtin), we should spill
    all registers that are being used as Liftoff cache registers.
    This CL defines platform-specific WasmDebugBreakFrameConstants which
    hold the set of registers to spill. This set is used in the builtin, and
    will later be used for inspecting the spilled registers.

    In order to iterate bit sets more easily in both direction (MSB to LSB
    or LSB to MSB), we add a base::bits::IterateBits{,Backwards} method
    which provides the respective iterators.

R=clemensb@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=
LOG=N

Change-Id: Ic308a7712f080e43a0c45f496b087ce8450f657a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2105563Reviewed-by: Junliang Yan <jyan@ca.ibm.com>
Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#66736}