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Milad Fa authored
Port 044a18ac Original Commit Message: The {LiftoffAssembler::Load} method already receives an {i64_offset} parameter which skips the UXTW (zero extension of 32-bit addresses) in the memory operand. The same needs to happen on stores. On 32-bit platforms, we cannot have addresses >=4GB anyway (they would be detected as OOB before reaching the point in question), so this is not a problem. On x64, all 32-bit registers are zero-extended already (which is debug-checked in the generated code), so this is also no problem (and we just ignore the additional parameter). R=clemensb@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: Ic531618875bf3b6abcf3741bcbe153e603d9f250 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3794647Reviewed-by: Clemens Backes <clemensb@chromium.org> Reviewed-by: Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Farazmand <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/main@{#82144}
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liftoff-assembler-ppc.h |