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Clemens Backes authored
For 64-bit binary operations, Liftoff on arm made the assumption that register pairs are always ordered, i.e. the register code for the low word is lower than the register code for the high word. Ensuring this was only implemented in {GetUnusedRegister} in https://crrev.com/c/2168875. Other cases were missing though, e.g. return values, but also different places were we construct register pairs internally. Thus, this CL removes this constraint again and instead handles unordered register pairs in 64-bit binary operations on arm. R=thibaudm@chromium.org Bug: chromium:1101304 Change-Id: I4cd9fb1577f82ab06d34c9dde6533cf04a2cade7 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2287870Reviewed-by: Thibaud Michaud <thibaudm@chromium.org> Commit-Queue: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68752}
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arm | ||
arm64 | ||
ia32 | ||
mips | ||
mips64 | ||
ppc | ||
s390 | ||
x64 | ||
DEPS | ||
liftoff-assembler-defs.h | ||
liftoff-assembler.cc | ||
liftoff-assembler.h | ||
liftoff-compiler.cc | ||
liftoff-compiler.h | ||
liftoff-register.h |