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Ng Zhi An authored
We also set these operations to explicitly require Register for the second operand (rhs) even if AVX is supported. Although AVX instructions support unaligned operands, there is potentially a performance hit, especially on older hardware. This matches the x64 instruction selector as well. Bug: v8:11217 Change-Id: Iae11ec23cc607842a034250028f7667fb2fcb0d0 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3114601Reviewed-by: Adam Klein <adamk@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/main@{#76474}
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code-generator-ia32.cc | ||
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instruction-selector-ia32.cc |