• Tom Tan's avatar
    [Win][ARM64] Fix shift mask constant for LLP64 · 8dea08e8
    Tom Tan authored
    Windows ARM64 does cross build for V8 and runs snapshot tool on build host
    under simulator. Simulator is built with LLP64 data model so 0xFFFFL is 32-bit
    long by default. It causes problem for the expression "0xFFFFL << shift" when
    shift is 32, which actually does nothing on x64 because 0xFFFFL is only 32-bit.
    The issue happens for instruction "movk rd, NUM lsl 32" which is simulated in
    
    Simulator::VisitMoveWideImmediate. "0xFFFL << shift" acts as mask to clear bits
    32-47 of the orignal value in rd. Under LLP64, the mask happens unexpectedly to
    the lowest 16 bits of rd register and corrupts the result of rd. Specify 0xFFFFL
    as 64 bit as 0xFFFFLL fixes this problem.
    
    Bug: chromium:893460
    Change-Id: Ibd911ce595e83637432a3e1f79a9bf28fcbe09f6
    Reviewed-on: https://chromium-review.googlesource.com/c/1475330
    Commit-Queue: Jakob Kummerow <jkummerow@chromium.org>
    Reviewed-by: 's avatarJaroslav Sevcik <jarin@chromium.org>
    Reviewed-by: 's avatarJakob Kummerow <jkummerow@chromium.org>
    Cr-Commit-Position: refs/heads/master@{#59778}
    8dea08e8
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