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Ng Zhi An authored
Implement i8x16 i16x8 i32x4 bitmask for arm and arm64. The instruction sequence is the same as TurboFan, we have some special handling for getting the second temporary Q register, reuse src if possible. Bug: v8:9909,v8:10308 Change-Id: I1c6fe0d076f0e14d05c4cc532e4d976f4ebcce30 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2222608 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68107}
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liftoff-assembler-arm64.h |