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Andreas Haas authored
On arm, the root register points into the middle of the roots array to allow to use the full int12_t offset range. Therefore some offsets into the root array are negative. This CL changes the liftoff assembler for arm to allow loads from negative offsets. On arm64, offsets can also be negative when pointer compression is disabled. Additionally this CL changes the signature of LiftoffAssembler::LoadTaggedPointer from uint32_t to int32_t to allow the LiftoffCompiler to provide negative indices. This CL does not come with a separate test yet. However, this changes is needed for https://crrev.com/c/2352784. Where there will also be a test. R=thibaudm@chromium.org Bug: v8:7581 Change-Id: I0a97a62ff8e934d45a4494adfbc74a3e1149c8c1 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2359429Reviewed-by: Thibaud Michaud <thibaudm@chromium.org> Commit-Queue: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#69453}
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liftoff-assembler-mips64.h |