This reverts commit 503f2a501e504f330821f247074e731aa649b1f0.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6977 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Review URL: http://codereview.chromium.org/6594037/

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6976 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Strict mode assignment to undefined reference.
Simple assignments (x = <value>) use CODE_TARGET_CONTEXT.
StoreIC stores its own strictness in extra_ic_state.
The strcitness is propagated as further ic stubs are generated.

Details:
* ReferenceError on assignment to non-resolvable reference in strict mode.
* Fix es5conform test expectation file.
* Add es5conform test suite into .gitignore.
* Fix Xcode project.
* Change implemented in virtual frame code generator, as well as full-codegen
  for all architectures.
* Fix debugger test.
* Fix comment for CODE_TARGET_CONTEXT
* Implement remaining StoreIC stubs to be strict mode aware.
* Trace extra_ic_state() for ic code stubs.

Code Review URL: http://codereview.chromium.org/6474026/

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6760 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Need to investigate.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6757 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Strict mode assignment to undefined reference.
Simple assignments (x = <value>) use CODE_TARGET_CONTEXT.
StoreIC stores its own strictness in extra_ic_state.
The strcitness is propagated as further ic stubs are generated.

Details:
* ReferenceError on assignment to non-resolvable reference in strict mode.
* Fix es5conform test expectation file.
* Add es5conform test suite into .gitignore.
* Fix Xcode project.
* Change implemented in virtual frame code generator, as well as full-codegen
  for all architectures.
* Fix debugger test.
* Fix comment for CODE_TARGET_CONTEXT
* Implement remaining StoreIC stubs to be strict mode aware.
* Trace extra_ic_state() for ic code stubs.

Code Review URL: http://codereview.chromium.org/6474026/

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6756 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Review URL: http://codereview.chromium.org/2868112

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5197 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Review URL: http://codereview.chromium.org/2828004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4932 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Generating code for function return on ARM is now aligned with the other platforms. The first non-shadowed return statement encountered will emit code for function return and all other returns including the fall through at the bottom of a function will jump to that.
Review URL: http://codereview.chromium.org/2815003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4856 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Improve code generation for known smis and suspected Smis.
Review URL: http://codereview.chromium.org/2452002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4783 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

in a spilled scope or not.  Also get rid of some spilled scopes
that we don't need any more.  The generators for the %_ functions,
CodeGenerator::Generate*, are now not spilled by default.  Some
of them (IsObject and related) have been converted to register
allocated operation.
Review URL: http://codereview.chromium.org/2368001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4749 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Use the jump targets to move the first deferred code to not flush
registers in the inlined case (KeyedLoad).
Review URL: http://codereview.chromium.org/2249002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4745 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Previously the receier was passed in both r0 and on the stack for a load IC. With this change the receiver is in r0 only.
Review URL: http://codereview.chromium.org/2119007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4681 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

The calling convention for keyed store IC on ARM is changed to receive the arguments value, key and receiver in registers r0, r1 and r2 instead of on the stack. When calling keyed store IC with a virtual frame the arguments are passed through the virtual frame and consumed by the call.

Changed the register usage in the IC code to postpone spilling the registers holding value, key and receiver to the stack until making  a call into the runtime system.

Runs all the tests with: 

  --special-command="@ --nofull-compiler"
  --special-command="@ --always-full-compiler"
  --special-command="@ --noenable-vfp3"
Review URL: http://codereview.chromium.org/2116003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4668 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Make use of the new functionality to make ++ and --
non-spilled operations.
Review URL: http://codereview.chromium.org/2041010

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4644 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

of having a list of virtual frame pointers in the jump
target we have one virtual frame, which is the frame that
all have to merge to to branch to that frame.  The virtual
frame in the JumpTarget is inside the JumpTarget, rather than
being an allocated object that is pointed to.  Unfortunately
this means that the JumpTarget class has to be able to see
the size of a VirtualFrame object to compile, which in turn
lead to a major reorganization of related .h files.  The
actual change of functionality in this change is intended
to be minimal (we now assert that the virtual frames match
when using JumpTarget instead of just assuming that they do).
Review URL: http://codereview.chromium.org/1961004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4631 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

The calling convention for keyed load IC's on ARM now passes the key and receiver in registers r0 and r1.

The code path in the ARM full compiler for handling keyed property load now has the same structure as for ia32 where the keyed load IC is also called with key end receiver in registers.

This change have been tested with an exhaustive combinations of the flags

  --special-command="@ --nofull-compiler"
  --special-command="@ --always-full-compiler"
  --special-command="@ --noenable-vfp3"

to the test runner.
Review URL: http://codereview.chromium.org/2024002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4608 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Review URL: http://codereview.chromium.org/1946001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4585 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

This is mainly a port of r3899. It also adds handling of initilization blocks in ARM which had no special handling before.

The "calling conventions" used for

  EmitNamedLoad
  EmitNamedStore
  EmitKeyedLoad
  EmitKeyedStore

are somewhat mixed, but will become more aligned as the use of register allication and passing of argument in registers to IC's is extended.
Review URL: http://codereview.chromium.org/1846002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4574 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Partial and small update to the codegen to use the new register allocator framework.  See http://codereview.chromium.org/1732024.  Committed for Rodolph Perfetta.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4564 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

This ports the inlining of keyed store to the ARM port. As the inlined code does not handle the write barrier it only supports storing of smis.
Review URL: http://codereview.chromium.org/1719021

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4531 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

broke it.
Review URL: http://codereview.chromium.org/1780010

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is both on top of the stack and also in r0.  This makes
sense because the receiver is usually in r0 anyway.  We may
remove it from the stack later.  Also removes some spilled
scopes from the code generator allowing it to keep expression
temporaries in registers more.
Review URL: http://codereview.chromium.org/1751019

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4518 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

This uses the same infrastructure as is used by the inlining of named property load. The code patching if the inlined code is simpler as the key is provided in a register os the only patching required is the map check directing the inlined code to the deferred code block or not.
Review URL: http://codereview.chromium.org/1735007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4510 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Instaed of having a nop after all non-inlined calls to load IC use a different nop (mov r1, r1 instead of mov r0, r0) to detect an inlined load IC.

Added more infrastructure to the deferred code handling to make it possbile to block constant pool emitting in a deferred code block, including the branch instruction ending the deferred code block.

Addressed a couple of comments to http://codereview.chromium.org/1715003, including adding an assert to make sure that the patching of an ldr instruction is always possible.
Review URL: http://codereview.chromium.org/1758003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4480 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Generate inlined named property load for in-object properties. This uses the same mechanism as on the Intel platforms with the map check and load instruction of the inlined code being	patched by the inline cache code. The map check is patched through the normal constant pool patching and the load instruction is patched in place.
Review URL: http://codereview.chromium.org/1715003

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on Mac is more pedantic.

Review URL: http://codereview.chromium.org/1652015

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Review URL: http://codereview.chromium.org/1623004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4381 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

stack for now.  Next step is probably fixing the binary
op stubs so they can take swapped registers and fixing
the deferred code so it doesn't insist that all registers
except the two operands are flushed.  Generates slightly
worse code sometimes because the peephole push-pop
elimination gets confused when we don't use the same
register all the time (the old code used r0 always).
Review URL: http://codereview.chromium.org/1604002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4368 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

The heavy version is for x86 and x64.  The light version
is for ARM and MIPS.  Remove the elements_ array from the
virtual frame in the light version.  More simplifications
to come, followed by light register allocation.
Review URL: http://codereview.chromium.org/1164002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4272 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Since we add more type (StringType, PrimitiveType) the name
NumberInfo does not make sense anymore.

Review URL: http://codereview.chromium.org/1207006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

This change fixes an assert we hit when we recognized a fast smi loop
with a parameter as the loop variable.

BUG=650


Review URL: http://codereview.chromium.org/1138003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4202 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

This change fixes a bug with the arguments object that occurred with
r4087 and r4088. The fix is not marking the arguments variable as trivial
since it can have side effects.


Review URL: http://codereview.chromium.org/851002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4099 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Review URL: http://codereview.chromium.org/805005

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Review URL: http://codereview.chromium.org/816003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4088 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Makes NumberInfo into a real class.
Fix bug where NumberInfo was lost in ToRegister.
Allow 17 bits in safe Smis instead of 16.
Review URL: http://codereview.chromium.org/668151

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4046 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Move a constructor to the platform-independent -inl.h file.

Review URL: http://codereview.chromium.org/660175

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3975 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Introducing a virtual-frame-inl.h file containing some platform-independent
virtual frame function which are small enough to be inlined.

Removed unnecessary #include of virtual-frame.h from register-allocator-inl.h
and added the necessary explicit includes in a number of files.

Review URL: http://codereview.chromium.org/660104

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3962 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Change the function declarations in the arm virtual frame header 
file to match the other platform.

TBR=kmillikin@chromium.org
Review URL: http://codereview.chromium.org/608007

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Review URL: http://codereview.chromium.org/568016

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