1. 09 Dec, 2015 1 commit
  2. 07 Dec, 2015 1 commit
  3. 25 Nov, 2015 2 commits
    • jochen's avatar
      Make whether or not a Code object should be created by masm explicit · aa9cfc82
      jochen authored
      We always want to have an Isolate, so just use an extra ctor arg
      
      BUG=2487
      R=yangguo@chromium.org,mstarzinger@chromium.org
      LOG=n
      
      Review URL: https://codereview.chromium.org/1476763002
      
      Cr-Commit-Position: refs/heads/master@{#32277}
      aa9cfc82
    • bmeurer's avatar
      [runtime] First step to sanitize regexp literal creation. · 09b44428
      bmeurer authored
      This is the initial step towards refactoring the regexp literation
      creation code to make it less obscure and more similar to the mechanism
      we use to create array and object literals.  There's now a new runtime
      entry %CreateRegExpLiteral with the same interface as the entries for
      array and object literals, except that we still pass the flags as
      string.
      
      Instead of embedding the hand written native to clone JSRegExp instances
      we now have a FastCloneRegExpStub, which behaves similar to the other
      FastCloneShallowArrayStub and FastCloneShallowObjectStub that we already
      had.
      
      R=mlippautz@chromium.org, yangguo@chromium.org
      
      Review URL: https://codereview.chromium.org/1475823003
      
      Cr-Commit-Position: refs/heads/master@{#32255}
      09b44428
  4. 23 Nov, 2015 1 commit
  5. 20 Nov, 2015 1 commit
  6. 08 Oct, 2015 1 commit
  7. 11 Sep, 2015 1 commit
  8. 12 Aug, 2015 1 commit
    • jfb's avatar
      Security: disable nontemporals. · a904b569
      jfb authored
      The operations were available on ARM64 and x86-32 but were unused.
      
      It has been conjectured that nontemporals can be used for rowhammer-like bitflips more easily than regular load/store operations. It is therefore desirable to avoid generating these instructions in the future.
      
      R= titzer, jochen, jln, Mark Seaborn, ruiq
      
      Review URL: https://codereview.chromium.org/1276113002
      
      Cr-Commit-Position: refs/heads/master@{#30139}
      a904b569
  9. 21 Apr, 2015 1 commit
  10. 19 Mar, 2015 1 commit
  11. 30 Jan, 2015 3 commits
  12. 20 Dec, 2014 1 commit
  13. 19 Dec, 2014 1 commit
  14. 22 Oct, 2014 1 commit
  15. 16 Sep, 2014 1 commit
  16. 07 Aug, 2014 1 commit
  17. 04 Aug, 2014 1 commit
  18. 30 Jul, 2014 1 commit
  19. 02 Jul, 2014 1 commit
  20. 01 Jul, 2014 2 commits
  21. 30 Jun, 2014 1 commit
  22. 20 Jun, 2014 1 commit
  23. 03 Jun, 2014 1 commit
  24. 23 May, 2014 1 commit
  25. 16 May, 2014 1 commit
  26. 12 May, 2014 1 commit
    • Jacob.Bramley@arm.com's avatar
      ARM64: Fix and improve MacroAssembler::Printf. · e876dab9
      Jacob.Bramley@arm.com authored
        - W-sized values passed to Printf are now handled correctly by the
          simulator. In AAPCS64, int32_t and int64_t are passed in the same
          way, so this didn't affect non-simulator builds.
        - Since Printf now records the type and size of each argument, it is
          possible to mix argument types.
        - It is now possible to print the stack pointer. There is only one
          remaining restriction: The `csp` register cannot be printed unless
          it is the current stack pointer. This is because it is modified by
          BumpSystemStackPointer when the caller-saved registers are
          preserved.
      
      BUG=
      R=rmcilroy@chromium.org
      
      Review URL: https://codereview.chromium.org/268353005
      
      git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21272 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      e876dab9
  27. 09 May, 2014 1 commit
  28. 06 May, 2014 1 commit
  29. 29 Apr, 2014 1 commit
  30. 16 Apr, 2014 1 commit
  31. 07 Apr, 2014 1 commit
  32. 03 Apr, 2014 1 commit
  33. 24 Mar, 2014 2 commits
  34. 21 Mar, 2014 1 commit
  35. 14 Mar, 2014 1 commit
    • jacob.bramley@arm.com's avatar
      A64: Fix a few simulation inaccuracies. · cf43195d
      jacob.bramley@arm.com authored
        - Return the correct NaN when an invalid operation generates a NaN.
        - When one or more operands are NaN, handle them as the processor
          would, prioritising signalling NaNs and making them quiet.
        - Fix fmadd and related instructions:
           - Fnmadd is fma(-n, m, -a), not -fma(n, m, a).
           - Some common libc implementations incorrectly implement fma for
             zero results, so work around these cases.
        - Replace some unreliable tests.
      
      This patch also adds support for Default-NaN mode, since once all the
      other work was done, it only required a couple of lines of code.
      Default-NaN mode was used for an optimisation in ARM, and it should now
      be possible to apply the same optimisation to A64.
      
      BUG=
      R=jochen@chromium.org
      
      Review URL: https://codereview.chromium.org/199083005
      
      git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19927 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      cf43195d