1. 22 Oct, 2015 1 commit
  2. 08 Oct, 2015 1 commit
  3. 02 Oct, 2015 3 commits
    • danno's avatar
      Re-reland: Remove register index/code indirection · 5cf1c0bc
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      Cr-Commit-Position: refs/heads/master@{#30913}
      
      Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
      Cr-Commit-Position: refs/heads/master@{#31075}
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#31087}
      5cf1c0bc
    • danno's avatar
      Revert of Reland: Remove register index/code indirection (patchset #20... · 00e07b00
      danno authored
      Revert of Reland: Remove register index/code indirection (patchset #20 id:380001 of https://codereview.chromium.org/1287383003/ )
      
      Reason for revert:
      Failures on MIPS
      
      Original issue's description:
      > Remove register index/code indirection
      >
      > Previous to this patch, both the lithium and TurboFan register
      > allocators tracked allocated registers by "indices", rather than
      > the register codes used elsewhere in the runtime. This patch
      > ensures that codes are used everywhere, and in the process cleans
      > up a bunch of redundant code and adds more structure to how the
      > set of allocatable registers is defined.
      >
      > Some highlights of changes:
      >
      > * TurboFan's RegisterConfiguration class moved to V8's top level
      >   so that it can be shared with Crankshaft.
      > * Various "ToAllocationIndex" and related methods removed.
      > * Code that can be easily shared between Register classes on
      >   different platforms is now shared.
      > * The list of allocatable registers on each platform is declared
      >   as a list rather than implicitly via the register index <->
      >   code mapping.
      >
      > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      > Cr-Commit-Position: refs/heads/master@{#30913}
      >
      > Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
      > Cr-Commit-Position: refs/heads/master@{#31075}
      
      TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      
      Review URL: https://codereview.chromium.org/1380863004
      
      Cr-Commit-Position: refs/heads/master@{#31083}
      00e07b00
    • danno's avatar
      Remove register index/code indirection · 7b7a8205
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      Cr-Commit-Position: refs/heads/master@{#30913}
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#31075}
      7b7a8205
  4. 24 Sep, 2015 2 commits
    • danno's avatar
      Revert of Remove register index/code indirection (patchset #17 id:320001 of... · 3ac27431
      danno authored
      Revert of Remove register index/code indirection (patchset #17 id:320001 of https://codereview.chromium.org/1287383003/ )
      
      Reason for revert:
      Failures on greedy RegAlloc, Fuzzer
      
      Original issue's description:
      > Remove register index/code indirection
      >
      > Previous to this patch, both the lithium and TurboFan register
      > allocators tracked allocated registers by "indices", rather than
      > the register codes used elsewhere in the runtime. This patch
      > ensures that codes are used everywhere, and in the process cleans
      > up a bunch of redundant code and adds more structure to how the
      > set of allocatable registers is defined.
      >
      > Some highlights of changes:
      >
      > * TurboFan's RegisterConfiguration class moved to V8's top level
      >   so that it can be shared with Crankshaft.
      > * Various "ToAllocationIndex" and related methods removed.
      > * Code that can be easily shared between Register classes on
      >   different platforms is now shared.
      > * The list of allocatable registers on each platform is declared
      >   as a list rather than implicitly via the register index <->
      >   code mapping.
      >
      > Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
      > Cr-Commit-Position: refs/heads/master@{#30913}
      
      TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      
      Review URL: https://codereview.chromium.org/1365073002
      
      Cr-Commit-Position: refs/heads/master@{#30914}
      3ac27431
    • danno's avatar
      Remove register index/code indirection · 80bc6f6e
      danno authored
      Previous to this patch, both the lithium and TurboFan register
      allocators tracked allocated registers by "indices", rather than
      the register codes used elsewhere in the runtime. This patch
      ensures that codes are used everywhere, and in the process cleans
      up a bunch of redundant code and adds more structure to how the
      set of allocatable registers is defined.
      
      Some highlights of changes:
      
      * TurboFan's RegisterConfiguration class moved to V8's top level
        so that it can be shared with Crankshaft.
      * Various "ToAllocationIndex" and related methods removed.
      * Code that can be easily shared between Register classes on
        different platforms is now shared.
      * The list of allocatable registers on each platform is declared
        as a list rather than implicitly via the register index <->
        code mapping.
      
      Review URL: https://codereview.chromium.org/1287383003
      
      Cr-Commit-Position: refs/heads/master@{#30913}
      80bc6f6e
  5. 17 Sep, 2015 1 commit
  6. 14 Sep, 2015 1 commit
  7. 03 Sep, 2015 1 commit
  8. 20 Aug, 2015 1 commit
  9. 17 Aug, 2015 1 commit
  10. 12 Aug, 2015 2 commits
  11. 15 Jul, 2015 1 commit
  12. 14 Jul, 2015 1 commit
  13. 13 Jul, 2015 1 commit
    • yangguo's avatar
      Debugger: refactor reloc info. · 198c75f6
      yangguo authored
      - split relocation info for debug break slots for
        - calls (with call arguments count as data)
        - construct calls
        - normal slots
      - renamed DEBUG_BREAK into DEBUGGER_STATEMENT
      - removed unused IC state for Debug stubs
      
      R=ulan@chromium.org
      BUG=v8:4269
      LOG=N
      
      Review URL: https://codereview.chromium.org/1232803002
      
      Cr-Commit-Position: refs/heads/master@{#29603}
      198c75f6
  14. 04 Jun, 2015 1 commit
    • mbrandy's avatar
      Add support for Embedded Constant Pools for PPC and Arm · eac7f046
      mbrandy authored
      Embed constant pools within their corresponding Code
      objects.
      
      This removes support for out-of-line constant pools in favor
      of the new approach -- the main advantage being that it
      eliminates the need to allocate and manage separate constant
      pool array objects.
      
      Currently supported on PPC and ARM.  Enabled by default on
      PPC only.
      
      This yields a 6% improvment in Octane on PPC64.
      
      R=bmeurer@chromium.org, rmcilroy@chromium.org, michael_dawson@ca.ibm.com
      BUG=chromium:478811
      LOG=Y
      
      Review URL: https://codereview.chromium.org/1162993006
      
      Cr-Commit-Position: refs/heads/master@{#28801}
      eac7f046
  15. 03 Jun, 2015 1 commit
  16. 02 Jun, 2015 1 commit
    • mbrandy's avatar
      Add support for Embedded Constant Pools for PPC and Arm · a9404029
      mbrandy authored
      Embed constant pools within their corresponding Code
      objects.
      
      This removes support for out-of-line constant pools in favor
      of the new approach -- the main advantage being that it
      eliminates the need to allocate and manage separate constant
      pool array objects.
      
      Currently supported on PPC and ARM.  Enabled by default on
      PPC only.
      
      This yields a 6% improvment in Octane on PPC64.
      
      R=danno@chromium.org, svenpanne@chromium.org, bmeurer@chromium.org, rmcilroy@chromium.org, dstence@us.ibm.com, michael_dawson@ca.ibm.com
      BUG=chromium:478811
      LOG=Y
      
      Review URL: https://codereview.chromium.org/1131783003
      
      Cr-Commit-Position: refs/heads/master@{#28770}
      a9404029
  17. 01 Jun, 2015 1 commit
  18. 20 May, 2015 1 commit
  19. 15 May, 2015 1 commit
  20. 19 Mar, 2015 1 commit
  21. 04 Mar, 2015 1 commit
    • yangguo's avatar
      Refactor BreakLocationIterator. · 1a608493
      yangguo authored
      We now have BreakLocation::Iterator to iterate via RelocIterator, and
      create a BreakLocation when we are done iterating. The reloc info is
      stored in BreakLocation in a GC-safe way and instantiated on demand.
      
      R=ulan@chromium.org
      BUG=v8:3924
      LOG=N
      
      Review URL: https://codereview.chromium.org/967323002
      
      Cr-Commit-Position: refs/heads/master@{#26983}
      1a608493
  22. 13 Feb, 2015 1 commit
  23. 12 Feb, 2015 4 commits
    • loislo's avatar
      CPUProfiler: Push deopt reason further to ProfileNode. · d23ab23b
      loislo authored
      1) create beefy RelocInfo table when cpu profiler is active, so if a function
      was optimized when profiler was active RelocInfo would get separate DeoptInfo
      for the each deopt case.
      
      2) push DeoptInfo from CodeEntry to ProfileNode.
      When deopt happens we put the info collected on #1 into CodeEntry and record stack sample.
      On the sampling thread we grab the deopt data and append it to the corresponding ProfileNode deopts list.
      
      Sample profile dump.
      [Top down]:
          0  (root) 0 #1
          1     29 #2
          1      test 29 #3
          2        opt_function 29 #4
          2          opt_function 29 #5
                         deopted at 118 with reason 'not a heap number'
                         deopted at 137 with reason 'division by zero'
      
      BUG=452067
      LOG=n
      
      Committed: https://crrev.com/ce8701b247d3c6604f24f17a90c02d17b4417f54
      Cr-Commit-Position: refs/heads/master@{#26615}
      
      Review URL: https://codereview.chromium.org/919953002
      
      Cr-Commit-Position: refs/heads/master@{#26630}
      d23ab23b
    • loislo's avatar
      Revert of CPUProfiler: Push deopt reason further to ProfileNode. (patchset #1... · cb6ea146
      loislo authored
      Revert of CPUProfiler: Push deopt reason further to ProfileNode. (patchset #1 id:1 of https://codereview.chromium.org/919953002/)
      
      Reason for revert:
      static initializers broke the build
      
      Original issue's description:
      > CPUProfiler: Push deopt reason further to ProfileNode.
      >
      > 1) create beefy RelocInfo table when cpu profiler is active, so if a function
      > was optimized when profiler was active RelocInfo would get separate DeoptInfo
      > for the each deopt case.
      >
      > 2) push DeoptInfo from CodeEntry to ProfileNode.
      > When deopt happens we put the info collected on #1 into CodeEntry and record stack sample.
      > On the sampling thread we grab the deopt data and append it to the corresponding ProfileNode deopts list.
      >
      > Sample profile dump.
      > [Top down]:
      >     0  (root) 0 #1
      >     1     29 #2
      >     5      test 29 #3
      >     3        opt_function 29 #4
      >                  deopted at 52 with reason 'not a heap number'
      >                  deopted at 71 with reason 'division by zero'
      >
      > BUG=452067
      > LOG=n
      >
      > Committed: https://crrev.com/ce8701b247d3c6604f24f17a90c02d17b4417f54
      > Cr-Commit-Position: refs/heads/master@{#26615}
      
      TBR=jarin@chromium.org,svenpanne@chromium.org,yurys@chromium.org,alph@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      BUG=452067
      
      Review URL: https://codereview.chromium.org/915173005
      
      Cr-Commit-Position: refs/heads/master@{#26616}
      cb6ea146
    • loislo's avatar
      CPUProfiler: Push deopt reason further to ProfileNode. · ce8701b2
      loislo authored
      1) create beefy RelocInfo table when cpu profiler is active, so if a function
      was optimized when profiler was active RelocInfo would get separate DeoptInfo
      for the each deopt case.
      
      2) push DeoptInfo from CodeEntry to ProfileNode.
      When deopt happens we put the info collected on #1 into CodeEntry and record stack sample.
      On the sampling thread we grab the deopt data and append it to the corresponding ProfileNode deopts list.
      
      Sample profile dump.
      [Top down]:
          0  (root) 0 #1
          1     29 #2
          5      test 29 #3
          3        opt_function 29 #4
                       deopted at 52 with reason 'not a heap number'
                       deopted at 71 with reason 'division by zero'
      
      BUG=452067
      LOG=n
      
      Review URL: https://codereview.chromium.org/919953002
      
      Cr-Commit-Position: refs/heads/master@{#26615}
      ce8701b2
    • danno's avatar
      Remove redundant source position information in RelocInfo · e87c0bac
      danno authored
      Previously, emitting two more more unique source positions at the same pc would
      generate two or more RelocInfo entries. Now, only the last emitted source
      position for any pc is added to the RelocInfo.
      
      Review URL: https://codereview.chromium.org/908443002
      
      Cr-Commit-Position: refs/heads/master@{#26608}
      e87c0bac
  24. 11 Feb, 2015 1 commit
  25. 05 Feb, 2015 3 commits
  26. 04 Feb, 2015 2 commits
    • loislo's avatar
      Revert of Externalize deoptimization reasons. (patchset #6 id:100001 of... · bfc5d83b
      loislo authored
      Revert of Externalize deoptimization reasons. (patchset #6 id:100001 of https://codereview.chromium.org/874323003/)
      
      Reason for revert:
      it broke the build
      
      Original issue's description:
      > Externalize deoptimization reasons.
      >
      > 1) The hardcoded strings were converted into DeoptReason enum.
      >
      > 2) Deopt comment were converted into a pair location and deopt reason entries so
      > the deopt reason tracking mode would less affect the size of the RelocInfo table and heap.
      >
      > 3) DeoptReason entry in RelocInfo reuses kCommentTag value and generates short entry in RelocInfo table.
      >
      > BUG=452067
      > LOG=n
      >
      > Committed: https://crrev.com/c49820e45b57f128a98690940875c049f612dde6
      > Cr-Commit-Position: refs/heads/master@{#26434}
      
      TBR=alph@chromium.org,mstarzinger@chromium.org,svenpanne@chromium.org,yurys@chromium.org
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      BUG=452067
      
      Review URL: https://codereview.chromium.org/892843007
      
      Cr-Commit-Position: refs/heads/master@{#26435}
      bfc5d83b
    • loislo's avatar
      Externalize deoptimization reasons. · c49820e4
      loislo authored
      1) The hardcoded strings were converted into DeoptReason enum.
      
      2) Deopt comment were converted into a pair location and deopt reason entries so
      the deopt reason tracking mode would less affect the size of the RelocInfo table and heap.
      
      3) DeoptReason entry in RelocInfo reuses kCommentTag value and generates short entry in RelocInfo table.
      
      BUG=452067
      LOG=n
      
      Review URL: https://codereview.chromium.org/874323003
      
      Cr-Commit-Position: refs/heads/master@{#26434}
      c49820e4
  27. 19 Dec, 2014 1 commit
    • arajp's avatar
      Make FlushICache NOP for Nvidia Denver CPU's. · f4fb7025
      arajp authored
      Denver supports a coherent cache mechanism. There is no need to clean
      the D cache and invalidate I cache. MTS has to check the translation
      anytime there is an I cache invalidate and this time can be saved by
      making FlushICache a NOP.
      
      The patch improves Octane by roughly 3-4% on Denver.
      
      Review URL: https://codereview.chromium.org/797233002
      
      Cr-Commit-Position: refs/heads/master@{#25898}
      f4fb7025
  28. 16 Dec, 2014 2 commits
  29. 07 Nov, 2014 1 commit