1. 24 Aug, 2017 1 commit
  2. 23 Aug, 2017 1 commit
    • Ross McIlroy's avatar
      Reland "[Compiler] Remove code aging support." · 8bf15bf1
      Ross McIlroy authored
      > This reverts commit 42d3d36b.
      > 
      > Original change's description:
      > > [Compiler] Remove code aging support.
      > > 
      > > Code aging is no longer supported by any remaining compilers now
      > > that full codegen has been removed. This CL removes all vestiges of
      > > code aging.
      > > 
      > > BUG=v8:6409
      > > 
      > > Change-Id: I945ebcc20c7c55120550c8ee36188bfa042ea65e
      > > Reviewed-on: https://chromium-review.googlesource.com/619153
      > > Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
      > > Reviewed-by: Yang Guo <yangguo@chromium.org>
      > > Reviewed-by: Ulan Degenbaev <ulan@chromium.org>
      > > Reviewed-by: Marja Hölttä <marja@chromium.org>
      > > Commit-Queue: Ross McIlroy <rmcilroy@chromium.org>
      > > Cr-Commit-Position: refs/heads/master@{#47501}
      > 
      > TBR=ulan@chromium.org,rmcilroy@chromium.org,marja@chromium.org,yangguo@chromium.org,mstarzinger@chromium.org,rodolph.perfetta@arm.com
      > 
      > Change-Id: I9d8b2985e2d472697908270d93a35eb7ef9c88a8
      > No-Presubmit: true
      > No-Tree-Checks: true
      > No-Try: true
      > Bug: v8:6409
      > Reviewed-on: https://chromium-review.googlesource.com/625998
      > Reviewed-by: Ross McIlroy <rmcilroy@chromium.org>
      > Commit-Queue: Ross McIlroy <rmcilroy@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#47506}
      
      TBR=ulan@chromium.org,rmcilroy@chromium.org,marja@chromium.org,yangguo@chromium.org,mstarzinger@chromium.org,rodolph.perfetta@arm.com
      
      Change-Id: I68785c6be7686e874b3848103e3a34483eaeb519
      No-Presubmit: true
      No-Tree-Checks: true
      No-Try: true
      Bug: v8:6409
      Reviewed-on: https://chromium-review.googlesource.com/625919Reviewed-by: 's avatarRoss McIlroy <rmcilroy@chromium.org>
      Reviewed-by: 's avatarYang Guo <yangguo@chromium.org>
      Commit-Queue: Ross McIlroy <rmcilroy@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#47535}
      8bf15bf1
  3. 22 Aug, 2017 4 commits
  4. 21 Aug, 2017 2 commits
  5. 03 Aug, 2017 1 commit
  6. 02 Aug, 2017 1 commit
  7. 27 Jul, 2017 2 commits
    • Jaideep Bajwa's avatar
      PPC/s390: Reland "[arm] Restrict grouping pushes before a TailCall to registers only" · a2388599
      Jaideep Bajwa authored
      Port 79bcb454
      
      Original Commit Message:
      
          This is a reland of a72b2f88
          Original change's description:
          > [arm] Restrict grouping pushes before a TailCall to registers only
          >
          > We optimize parallel moves performed before a TailCall by grouping adjacent
          > pushes. This way, we may use a single instruction to push multiple registers at
          > once. However, we also have support for pushing immediates and stack slots for
          > which the benefit is questionnable therefore this patch removes support for
          > them.
          >
          > Concerning immediate pushes, it looks like a mistake since we do not have
          > support for this case in `AssembleMove` so this patch removes it. Furthermore,
          > if we add a test for this case, we see that a `push ip` instruction is
          > generated, effectively pushing whatever was in `ip` at the time instead of
          > pushing a constant.
          >
          > Concerning stack slot pushes, we generate a more or less equivalent sequence of
          > instructions.
          >
          > Finally, grouping floating point pushes is not used anywhere so this patch
          > removes support for this also.
          >
          > Bug: v8:6553
          > Change-Id: I9b820d33361fc442dd813f66e1f96cda41009110
          > Reviewed-on: https://chromium-review.googlesource.com/567191
          > Reviewed-by: Benedikt Meurer <bmeurer@chromium.org>
          > Commit-Queue: Pierre Langlois <pierre.langlois@arm.com>
          > Cr-Commit-Position: refs/heads/master@{#46718}
      
      R=pierre.langlois@arm.com, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
      BUG=
      LOG=N
      
      Change-Id: I8790c7a72f92803ea8fda3c6dc7e6b013e2e09e9
      Reviewed-on: https://chromium-review.googlesource.com/588471Reviewed-by: 's avatarJunliang Yan <jyan@ca.ibm.com>
      Commit-Queue: Jaideep Bajwa <bjaideep@ca.ibm.com>
      Cr-Commit-Position: refs/heads/master@{#46949}
      a2388599
    • Jaideep Bajwa's avatar
      PPC/s390: Switch JSFunction::code to be a tagged value. · 9836cdb1
      Jaideep Bajwa authored
      Port 4e207a42
      
      Original Commit Message:
      
          This switches the "code entry" field on JSFunction to no longer be an
          inner pointer into a Code object (i.e. to the start of the instruction
          stream), but a properly tagged pointer instead.
      
          Motivation behind this is the ability to treat this field regularly as
          part of escape analysis in the optimizing compiler. Also simplifies the
          object visitation for JSFunction objects.
      
      R=mstarzinger@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
      BUG=
      LOG=N
      
      Change-Id: Ifa5998551e041c8de647df7306dd549455936699
      Reviewed-on: https://chromium-review.googlesource.com/588468Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
      Commit-Queue: Jaideep Bajwa <bjaideep@ca.ibm.com>
      Cr-Commit-Position: refs/heads/master@{#46934}
      9836cdb1
  8. 26 Jul, 2017 3 commits
  9. 24 Jul, 2017 1 commit
  10. 20 Jul, 2017 1 commit
  11. 14 Jul, 2017 1 commit
  12. 12 Jul, 2017 1 commit
  13. 10 Jul, 2017 1 commit
    • Enrico Bacis's avatar
      [ppc] use Double instead of double in ppc compiler · 5457e8a9
      Enrico Bacis authored
      The use of double variables to store bit patterns may lead to bit flips
      when the stored bit pattern is a signaling NaN (sNaN). Operations on a
      sNaN variable (even just returning the variable from a function) may
      turn it into a quiet NaN (qNaN), flipping the signaling bit and
      affecting the information stored in the variable.
      
      We observed this behaviour on ia32 architectures and therefore in the
      simulator builds for other platforms. The use of the wrapper class
      Double should prevent this behaviour.
      
      R=ahaas@chromium.org
      
      Change-Id: Ibd1119924a59db771fd4c250689ad9c2a35fff75
      Reviewed-on: https://chromium-review.googlesource.com/562771Reviewed-by: 's avatarJaideep Bajwa <bjaideep@ca.ibm.com>
      Reviewed-by: 's avatarAndreas Haas <ahaas@chromium.org>
      Commit-Queue: Enrico Bacis <enricobacis@google.com>
      Cr-Commit-Position: refs/heads/master@{#46533}
      5457e8a9
  14. 19 Jun, 2017 1 commit
  15. 08 Jun, 2017 1 commit
    • bbudge's avatar
      [WASM] Eliminate SIMD boolean vector types. · 381f7da0
      bbudge authored
      - Eliminates b1x4, b1x8, and b1x16 as distinct WASM types.
      - All vector comparisons return v128 type.
      - Eliminates b1xN and, or, xor, not.
      - Selects take a v128 mask vector and are now bit-wise.
      - Adds a new test for Select, where mask is non-canonical (not 0's and -1's).
      
      LOG=N
      BUG=v8:6020
      
      Review-Url: https://codereview.chromium.org/2919203002
      Cr-Commit-Position: refs/heads/master@{#45795}
      381f7da0
  16. 31 May, 2017 1 commit
  17. 30 May, 2017 1 commit
  18. 22 May, 2017 1 commit
  19. 16 May, 2017 2 commits
  20. 09 May, 2017 2 commits
  21. 11 Apr, 2017 1 commit
  22. 31 Mar, 2017 1 commit
  23. 30 Mar, 2017 1 commit
  24. 29 Mar, 2017 1 commit
  25. 21 Mar, 2017 1 commit
  26. 17 Mar, 2017 1 commit
    • neis's avatar
      Disentangle assembler from isolate. · 94b088ca
      neis authored
      This is a first step towards moving Turbofan code generation off the main thread.
      
      Summary of the changes:
      - AssemblerBase no longer has a pointer to the isolate. Instead, its
        constructor receives the few things that it needs from the isolate (on most
        architectures this is just the serializer_enabled flag).
      - RelocInfo no longer has a pointer to the isolate. Instead, the functions
        that need it take it as an argument.  (There are currently still a few that
        implicitly access the isolate through a HeapObject.)
      - The MacroAssembler now explicitly holds a pointer to the isolate (before, it
        used to get it from the Assembler).
      - The jit_cookie also moved from AssemblerBase to the MacroAssemblers, since
        it's not used at all in the Assemblers.
      - A few architectures implemented parts of the Assembler with the help
        of a Codepatcher that is based on MacroAssembler.  Since the Assembler no
        longer has the isolate, but the MacroAssembler still needs it, this doesn't
        work anymore.  Instead, these Assemblers now use a new PatchingAssembler.
      
      BUG=v8:6048
      
      Review-Url: https://codereview.chromium.org/2732273003
      Cr-Commit-Position: refs/heads/master@{#43890}
      94b088ca
  27. 16 Mar, 2017 1 commit
  28. 13 Mar, 2017 1 commit
  29. 08 Mar, 2017 1 commit
  30. 22 Feb, 2017 1 commit
    • bjaideep's avatar
      PPC/s390: [wasm] Use builtins wrappers for traps · f8158cdb
      bjaideep authored
      Port 73d45c96
      
      Original Commit Message:
      
          With this CL the out-of-line code of TrapIf will call a builtin instead
          of doing a direct runtime call, which is cheaper. In the best case, the
          out-of-line code now consists of a single call instruction. The builtin
          will load the trapID and then call the runtime to throw a trap.
      
      R=ahaas@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
      BUG=
      LOG=N
      
      Review-Url: https://codereview.chromium.org/2713433003
      Cr-Commit-Position: refs/heads/master@{#43382}
      f8158cdb
  31. 21 Feb, 2017 1 commit
    • bjaideep's avatar
      PPC/s390: [everywhere] Custom representation for frame type · af76645b
      bjaideep authored
      Port fd596007
      
      Original Commit Message:
      
          Use an opaque format for the frame type marker on the stack, where the
          marker is simply shifted left by 1 instead of being a Smi. This allows
          us to generate simpler code for frame initialisation, as we can push a
          smaller value, decreasing the prologue by 4 bytes and one instruction.
      
      R=leszeks@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
      BUG=
      LOG=N
      
      Review-Url: https://codereview.chromium.org/2709483007
      Cr-Commit-Position: refs/heads/master@{#43356}
      af76645b