1. 22 Aug, 2016 1 commit
  2. 22 Jul, 2016 1 commit
    • bmeurer's avatar
      [turbofan] Change Float64Max/Float64Min to JavaScript semantics. · ba092fb0
      bmeurer authored
      So far we don't have a useful way to inline Math.max or Math.min in
      TurboFan optimized code. This adds new operators NumberMax and NumberMin
      and changes the Float64Max/Float64Min operators to have JavaScript
      semantics instead of the C++ semantics that it had previously.
      
      This also removes support for recognizing the tenary case in the
      CommonOperatorReducer, since that doesn't seem to have any positive
      impact (and actually doesn't show up in regular JavaScript, where
      people use Math.max/Math.min instead).
      
      Drive-by-fix: Also nuke the unused Float32Max/Float32Min operators.
      
      R=jarin@chromium.org
      
      Review-Url: https://codereview.chromium.org/2170343002
      Cr-Commit-Position: refs/heads/master@{#37971}
      ba092fb0
  3. 14 Jun, 2016 1 commit
  4. 10 Jun, 2016 1 commit
    • bmeurer's avatar
      [builtins] Introduce proper base::ieee754::log. · d0c7775d
      bmeurer authored
      This switches Math.log to use an fdlibm based version of log, imported
      as base::ieee754::log, and use that consistently everywhere, i.e. change
      the Float64Log TurboFan operators on Intel to use the C++ implementation
      as well (same for Crankshaft).
      
      R=yangguo@chromium.org
      BUG=v8:5065,v8:5086
      
      Review-Url: https://codereview.chromium.org/2053893003
      Cr-Commit-Position: refs/heads/master@{#36880}
      d0c7775d
  5. 03 Jun, 2016 1 commit
    • bmeurer's avatar
      [builtins] Migrate Math.log to TurboFan. · f2da19fe
      bmeurer authored
      Introduce a dedicated Float64Log machine operator, that is either
      implemented by a direct C call or by platform specific code, i.e.
      using the FPU on x64 and ia32.
      
      This operator is used to implement Math.log as a proper TurboFan
      builtin on top of the CodeStubAssembler.
      
      Also introduce a NumberLog simplified operator on top of Float64Log
      and use that for the fast inline path of Math.log inside TurboFan
      optimized code.
      
      BUG=v8:5065
      
      Review-Url: https://codereview.chromium.org/2029413005
      Cr-Commit-Position: refs/heads/master@{#36703}
      f2da19fe
  6. 03 May, 2016 1 commit
  7. 01 Apr, 2016 1 commit
    • epertoso's avatar
      [ia32] Byte and word memory operands in ia32 cmp/test. · 3dd3beb0
      epertoso authored
      Currently, if the size of two cmp or test operands is a byte or a word, we sign-extend or zero-extend each of them into a 32-bit register before doing the comparison, even when the conditions for the use of a memory operand are met.
      
      This CL makes it possible to load only one of them into a register and address the other as a memory operand.
      
      The tricky bit is that, unlike as in the x64 counterpart http://crrev.com/1780193003, not all registers can be accessed as bytes.
      
      BUG=
      
      Review URL: https://codereview.chromium.org/1845603002
      
      Cr-Commit-Position: refs/heads/master@{#35199}
      3dd3beb0
  8. 30 Mar, 2016 1 commit
    • ahaas's avatar
      [wasm] Int64Lowering of Int64Mul on ia32 and arm. · 40bdbef9
      ahaas authored
      Int64Mul is lowered to a new turbofan operator, Int32MulPair. The new
      operator takes 4 inputs an generates 2 outputs. The inputs are the low
      word of the left input, high word of the left input, the low word of the
      right input, and high word of the right input. The ouputs are the low
      and high word of the result of the multiplication.
      
      R=titzer@chromium.org, v8-arm-ports@googlegroups.com
      
      Review URL: https://codereview.chromium.org/1807273002
      
      Cr-Commit-Position: refs/heads/master@{#35131}
      40bdbef9
  9. 16 Mar, 2016 1 commit
    • ahaas's avatar
      [wasm] Int64Lowering of Int64Sub on ia32 and arm. · 33c08596
      ahaas authored
      Int64Sub is lowered to a new turbofan operator, Int32SubPair. The new
      operator takes 4 inputs an generates 2 outputs. The inputs are the low
      word of the left input, high word of the left input, the low word of the
      right input, and high word of the right input. The ouputs are the low
      and high word of the result of the subtraction.
      
      The implementation is very similar to the implementation of Int64Add.
      
      @v8-arm-ports: please take a careful look at the implementation of sbc
      in the simulator.
      
      R=titzer@chromium.org, v8-arm-ports@googlegroups.com
      
      Review URL: https://codereview.chromium.org/1778893005
      
      Cr-Commit-Position: refs/heads/master@{#34808}
      33c08596
  10. 14 Mar, 2016 1 commit
    • ahaas's avatar
      [wasm] Int64Lowering of Int64Add on ia32 and arm. · 1b230799
      ahaas authored
      Int64Add is lowered to a new turbofan operator, Int32AddPair. The new
      operator takes 4 inputs an generates 2 outputs. The inputs are the low
      word of the left input, high word of the left input, the low word of the
      right input, and high word of the right input. The ouputs are the low
      and high word of the result of the addition.
      
      R=titzer@chromium.org, v8-arm-ports@googlegroups.com
      
      Review URL: https://codereview.chromium.org/1778493004
      
      Cr-Commit-Position: refs/heads/master@{#34747}
      1b230799
  11. 09 Mar, 2016 1 commit
  12. 07 Mar, 2016 1 commit
    • ahaas's avatar
      [wasm] Int64Lowering of I64Shl on ia32. · ddc626e1
      ahaas authored
      I64Shl is lowered to a new turbofan operator, WasmWord64Shl. The new
      operator takes 3 inputs, the low-word input, the high-word input, and
      the shift, and produces 2 output, the low-word output and the high-word
      output.
      
      At the moment I implemented the lowering only for ia32, but I think the
      CL is already big enough. I will add the other platforms in separate
      CLs.
      
      R=titzer@chromium.org
      
      Review URL: https://codereview.chromium.org/1756863002
      
      Cr-Commit-Position: refs/heads/master@{#34546}
      ddc626e1
  13. 06 Feb, 2016 2 commits
  14. 16 Jan, 2016 2 commits
    • ahaas's avatar
      [turbofan] Add the RoundInt32ToFloat32 operator to turbofan. · e06f7d78
      ahaas authored
      The new operator converts an int32 input to float32. If the input cannot
      be represented exactly in float32, the value is rounded using the
      round-ties-even rounding mode (the default rounding mode).
      
      I provide implementations of the new operator for x64, ia32, arm, arm64,
      mips, mips64, ppc, and ppc64.
      
      R=titzer@chromium.org, v8-arm-ports@googlegroups.com, v8-mips-ports@googlegroups.com, v8-ppc-ports@googlegroups.com
      
      Review URL: https://codereview.chromium.org/1589363002
      
      Cr-Commit-Position: refs/heads/master@{#33347}
      e06f7d78
    • ahaas's avatar
      [turbofan] Add the TruncateFloat32ToInt32 operator to turbofan. · fc53eed1
      ahaas authored
      The new operator converts a float32 input to int32 through truncation.
      I provide implementations of the new operator for x64, ia32, arm,
      arm64, mips, mips64, and x87. @v8-ppc-ports, can you please take care
      of the ppc implementation?
      
      R=titzer@chromium.org, v8-arm-ports@googlegroups.com, v8-mips-ports@googlegroups.com, weiliang.lin@intel.com
      
      Review URL: https://codereview.chromium.org/1583323004
      
      Cr-Commit-Position: refs/heads/master@{#33346}
      fc53eed1
  15. 21 Dec, 2015 1 commit
    • ahaas's avatar
      [turbofan] Pass type information of arguments to EmitPrepareArguments. · c0c8c756
      ahaas authored
      On ia32 the code which pushes parameters on the stack depends on the
      types of the parameters which are to be pushed. I provide this type
      information now by not only passing parameter nodes to
      EmitPrepareArguments, but also the index in the call descriptor which
      belongs to the parameter nodes.
      
      This type information will also be necessary if we want to use the
      PokePair instruction on arm64 again.
      
      R=bradnelson@chromium.org, bmeurer@chromium.org
      
      Review URL: https://codereview.chromium.org/1534593004
      
      Cr-Commit-Position: refs/heads/master@{#32982}
      c0c8c756
  16. 25 Nov, 2015 1 commit
  17. 10 Nov, 2015 1 commit
  18. 16 Oct, 2015 1 commit
  19. 15 Oct, 2015 1 commit
  20. 21 Sep, 2015 1 commit
  21. 25 Jun, 2015 1 commit
  22. 11 Apr, 2015 1 commit
  23. 08 Apr, 2015 1 commit
  24. 07 Apr, 2015 1 commit
    • bmeurer's avatar
      [ia32] Match -0 - x with sign bit flip. · 49bb6617
      bmeurer authored
      We can use xorps/xorpd on Intel CPUs to flip the sign bit. Ideally we'd
      use an absolute 128-bit constant in the code object, as OCaml/GCC
      does, however that requires 128-bit alignment for code objects,
      which is not yet implemented. So for now we materialize the mask
      inline.
      
      As drive-by-fix, don't hardcode xmm0 as scratch double register.
      
      R=svenpanne@chromium.org
      
      Review URL: https://codereview.chromium.org/1064833002
      
      Cr-Commit-Position: refs/heads/master@{#27618}
      49bb6617
  25. 30 Mar, 2015 1 commit
    • bmeurer's avatar
      [turbofan] Add backend support for float32 operations. · 8dad78cd
      bmeurer authored
      This adds the basics necessary to support float32 operations in TurboFan.
      The actual functionality required to detect safe float32 operations will
      be added based on this later. Therefore this does not affect production
      code except for some cleanup/refactoring.
      
      In detail, this patchset contains the following features:
      - Add support for float32 operations to arm, arm64, ia32 and x64
        backends.
      - Add float32 machine operators.
      - Add support for float32 constants to simplified lowering.
      - Handle float32 representation for phis in simplified lowering.
      
      In addition, contains the following (related) cleanups:
      - Fix/unify naming of backend instructions.
      - Use AVX comparisons when available.
      - Extend ArchOpcodeField to 9 bits (required for arm64).
      - Refactor some code duplication in instruction selectors.
      
      BUG=v8:3589
      LOG=n
      R=dcarney@chromium.org
      
      Review URL: https://codereview.chromium.org/1044793002
      
      Cr-Commit-Position: refs/heads/master@{#27509}
      8dad78cd
  26. 20 Mar, 2015 1 commit
  27. 12 Mar, 2015 1 commit
  28. 10 Mar, 2015 1 commit
    • bmeurer's avatar
      [turbofan] Unify Math.floor / Math.ceil optimization. · 022ea7e0
      bmeurer authored
      Provide an intrinsic %MathFloor / %_MathFloor that is used to optimize
      both Math.ceil and Math.floor, and use the JS inlining mechanism to
      inline Math.ceil into TurboFan code. Although we need to touch code
      outside of TurboFan to make this work, this does not affect the way we
      handle Math.ceil and/or Math.floor in CrankShaft, because for CrankShaft
      the old-style builtin function id based inlining still kicks in first.
      
      Once this solution is stabilized, we can use it for Math.floor as well.
      And once that is settled, we can establish it as the unified way to
      inline builtins, and get rid of the specialized builtin function id
      based inlining at some point.
      
      Note that "builtin" applies to basically every piece of internal
      JavaScript/intrinsics based code, so this also applies to the yet to be
      defined JavaScript based code stubs and handlers.
      
      BUG=v8:3953
      LOG=n
      R=yangguo@chromium.org,svenpanne@chromium.org
      
      Review URL: https://codereview.chromium.org/990963003
      
      Cr-Commit-Position: refs/heads/master@{#27086}
      022ea7e0
  29. 09 Mar, 2015 1 commit
  30. 05 Mar, 2015 1 commit
  31. 02 Dec, 2014 1 commit
  32. 03 Nov, 2014 1 commit
  33. 30 Oct, 2014 1 commit
  34. 14 Oct, 2014 1 commit
  35. 30 Sep, 2014 1 commit
  36. 29 Sep, 2014 1 commit
  37. 24 Sep, 2014 2 commits