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  1. 15 Feb, 2016 1 commit
  3. 11 Feb, 2016 1 commit
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  7. 27 Nov, 2015 2 commits
  9. 23 Oct, 2015 1 commit
    • zhengxing.li's avatar
      X87: Re-reland: Remove register index/code indirection. · 2e5845f1
      zhengxing.li authored 
          port 5cf1c0bc (r31087).

    original commit message:
    Previous to this patch, both the lithium and TurboFan register
    allocators tracked allocated registers by "indices", rather than
    the register codes used elsewhere in the runtime. This patch
    ensures that codes are used everywhere, and in the process cleans
    up a bunch of redundant code and adds more structure to how the
    set of allocatable registers is defined.

    Some highlights of changes:

    * TurboFan's RegisterConfiguration class moved to V8's top level
      so that it can be shared with Crankshaft.
    * Various "ToAllocationIndex" and related methods removed.
    * Code that can be easily shared between Register classes on
      different platforms is now shared.
    * The list of allocatable registers on each platform is declared
      as a list rather than implicitly via the register index <->
      code mapping.

    additional comment:
    This patch must be work with CL https://codereview.chromium.org/1405673003/
    and CL https://codereview.chromium.org/1413343002/
    which provide the needed register allocation common code change in
    v8 for this CL

BUG=

Review URL: https://codereview.chromium.org/1410393004

Cr-Commit-Position: refs/heads/master@{#31494}
      2e5845f1
  11. 17 Aug, 2015 1 commit
  13. 12 Aug, 2015 1 commit
  15. 24 Jul, 2015 1 commit
  17. 04 Jun, 2015 1 commit
    • mbrandy's avatar
      Add support for Embedded Constant Pools for PPC and Arm · eac7f046
      mbrandy authored 
      Embed constant pools within their corresponding Code
objects.

This removes support for out-of-line constant pools in favor
of the new approach -- the main advantage being that it
eliminates the need to allocate and manage separate constant
pool array objects.

Currently supported on PPC and ARM.  Enabled by default on
PPC only.

This yields a 6% improvment in Octane on PPC64.

R=bmeurer@chromium.org, rmcilroy@chromium.org, michael_dawson@ca.ibm.com
BUG=chromium:478811
LOG=Y

Review URL: https://codereview.chromium.org/1162993006

Cr-Commit-Position: refs/heads/master@{#28801}
      eac7f046
  19. 03 Jun, 2015 1 commit
  21. 02 Jun, 2015 1 commit
    • mbrandy's avatar
      Add support for Embedded Constant Pools for PPC and Arm · a9404029
      mbrandy authored 
      Embed constant pools within their corresponding Code
objects.

This removes support for out-of-line constant pools in favor
of the new approach -- the main advantage being that it
eliminates the need to allocate and manage separate constant
pool array objects.

Currently supported on PPC and ARM.  Enabled by default on
PPC only.

This yields a 6% improvment in Octane on PPC64.

R=danno@chromium.org, svenpanne@chromium.org, bmeurer@chromium.org, rmcilroy@chromium.org, dstence@us.ibm.com, michael_dawson@ca.ibm.com
BUG=chromium:478811
LOG=Y

Review URL: https://codereview.chromium.org/1131783003

Cr-Commit-Position: refs/heads/master@{#28770}
      a9404029
  23. 01 Jun, 2015 1 commit
  25. 18 Mar, 2015 1 commit
  27. 11 Feb, 2015 2 commits
  29. 05 Dec, 2014 1 commit
  31. 20 Sep, 2014 1 commit
  33. 12 Sep, 2014 1 commit
  35. 04 Aug, 2014 1 commit
  37. 30 Jul, 2014 1 commit
  39. 26 Jun, 2014 1 commit
    • weiliang.lin@intel.com's avatar
      X87: The IC exposes a register definition. · 8ff53a8d
      weiliang.lin@intel.com authored 
      port r22011

original commit message:
  Centralize a register definition in an IC that provides:
  1) symbolic names for the register (like, edx == receiver)
  2) defines ordering when passed on the stack

  Code that implements or uses the IC should use this definition instead of "knowing" what the registers are. Or at least have the definition to validate it's assumptions.

  As a side effect of avoiding runtime static initializers (enforced by tools/check-static-initializers.sh, neat), I gave ownership of the registers array to CodeStubInterfaceDescriptor. This prompted a cleanup of that struct

BUG=
R=weiliang.lin@intel.com

Review URL: https://codereview.chromium.org/358773002

Patch from Chunyang Dai <chunyang.dai@intel.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22028 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
      8ff53a8d
  41. 03 Jun, 2014 1 commit
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  67. 04 Oct, 2013 1 commit
  69. 01 Oct, 2013 2 commits