- 02 Aug, 2017 3 commits
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Ilija Pavlovic authored
Port for https://chromium-review.googlesource.com/c/571011/ In macro-assembler-mips64.*, function StubPrologue is left intentionally. (See: https://codereview.chromium.org/2467513002) TEST= BUG= Change-Id: I95de571c636cce88fc2c40e5d8c60162004634a6 Reviewed-on: https://chromium-review.googlesource.com/591127 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#47073}
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Julien Brianceau authored
Bug: chromium:750830 Cq-Include-Trybots: master.tryserver.blink:linux_trusty_blink_rel;master.tryserver.chromium.linux:linux_chromium_rel_ng;master.tryserver.v8:v8_linux_noi18n_rel_ng Change-Id: Icab7b5a1c469d5e77d04df8bfca8319784e92af4 Reviewed-on: https://chromium-review.googlesource.com/595655 Commit-Queue: Julien Brianceau <jbriance@cisco.com> Reviewed-by: Yang Guo <yangguo@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Daniel Ehrenberg <littledan@chromium.org> Cr-Commit-Position: refs/heads/master@{#47072}
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Juliana Franco authored
Replacing pc with trampoline on stack This CL is the follow up of https://chromium-review.googlesource.com/c/586707/ which used to crash when running the gc-stress bots. It seems to be working now. We now keep the trampoline PC in the Safepoint table and use that information to find SafepointEntries. There's some refactoring that can be done, such as changing the code for exceptions in a similar way and removing the trampoline from the DeoptimizationInputData. Will take care of this in the next CL. Bug: v8:6563 Change-Id: I8c0a2489de19e6d5fb4ebf1de7da1933726265b4 Reviewed-on: https://chromium-review.googlesource.com/596027 Commit-Queue: Juliana Patricia Vicente Franco <jupvfranco@google.com> Reviewed-by: Jaroslav Sevcik <jarin@chromium.org> Cr-Commit-Position: refs/heads/master@{#47066}
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- 01 Aug, 2017 2 commits
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Michael Achenbach authored
This reverts commit a01ac7cb. Reason for revert: Causes flakes on gc stress: https://build.chromium.org/p/client.v8/builders/V8%20Linux64%20GC%20Stress%20-%20custom%20snapshot/builds/14218 Original change's description: > Replacing pc with trampoline on stack > > This CL is the follow up of https://chromium-review.googlesource.com/c/586707/ > which used to crash when running the gc-stress bots. > It seems to be working now. We now keep the trampoline PC in the Safepoint > table and use that information to find SafepointEntries. > > There's some refactoring that can be done, such as changing the code for > exceptions in a similar way and removing the trampoline from the > DeoptimizationInputData. Will take care of this in the next CL. > > Bug: v8:6563 > Change-Id: I02565297093620023a1155b55d76a4dafcb54794 > Reviewed-on: https://chromium-review.googlesource.com/593622 > Commit-Queue: Juliana Patricia Vicente Franco <jupvfranco@google.com> > Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> > Reviewed-by: Jaroslav Sevcik <jarin@chromium.org> > Cr-Commit-Position: refs/heads/master@{#47030} TBR=jarin@chromium.org,bmeurer@chromium.org,jupvfranco@google.com Change-Id: Ie9929c9acae321a91014b76b9008f8835313e67d No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:6563 Reviewed-on: https://chromium-review.googlesource.com/595927Reviewed-by: Michael Achenbach <machenbach@chromium.org> Commit-Queue: Michael Achenbach <machenbach@chromium.org> Cr-Commit-Position: refs/heads/master@{#47038}
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Juliana Franco authored
This CL is the follow up of https://chromium-review.googlesource.com/c/586707/ which used to crash when running the gc-stress bots. It seems to be working now. We now keep the trampoline PC in the Safepoint table and use that information to find SafepointEntries. There's some refactoring that can be done, such as changing the code for exceptions in a similar way and removing the trampoline from the DeoptimizationInputData. Will take care of this in the next CL. Bug: v8:6563 Change-Id: I02565297093620023a1155b55d76a4dafcb54794 Reviewed-on: https://chromium-review.googlesource.com/593622 Commit-Queue: Juliana Patricia Vicente Franco <jupvfranco@google.com> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Jaroslav Sevcik <jarin@chromium.org> Cr-Commit-Position: refs/heads/master@{#47030}
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- 28 Jul, 2017 2 commits
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Juliana Patricia Vicente Franco authored
This reverts commit e15f5544. Reason for revert: it breaks the GC stress. Original change's description: > Changing the return address on the stack. > > Rather than patching code, the deoptimizer now replaces the > return address in the frames with respective trampolines. > This change required to change the way we search for Safepoint > entries and for Exception Handlers. > It's working in architectures: x64, ia32, arm, arm64 and mips. > > Bug: V8:6563 > Change-Id: I3cbd4d192c3513f307b3a6a2ac99e60d03c753d3 > Reviewed-on: https://chromium-review.googlesource.com/586707 > Commit-Queue: Juliana Patricia Vicente Franco <jupvfranco@google.com> > Reviewed-by: Jaroslav Sevcik <jarin@chromium.org> > Cr-Commit-Position: refs/heads/master@{#46967} TBR=jarin@chromium.org,bmeurer@chromium.org,jupvfranco@google.com Change-Id: I430fa9123beef2e0723b38cdef9537181203f7e7 No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: V8:6563 Reviewed-on: https://chromium-review.googlesource.com/591371 Commit-Queue: Jaroslav Sevcik <jarin@chromium.org> Reviewed-by: Jaroslav Sevcik <jarin@chromium.org> Cr-Commit-Position: refs/heads/master@{#46969}
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Juliana Franco authored
Rather than patching code, the deoptimizer now replaces the return address in the frames with respective trampolines. This change required to change the way we search for Safepoint entries and for Exception Handlers. It's working in architectures: x64, ia32, arm, arm64 and mips. Bug: V8:6563 Change-Id: I3cbd4d192c3513f307b3a6a2ac99e60d03c753d3 Reviewed-on: https://chromium-review.googlesource.com/586707 Commit-Queue: Juliana Patricia Vicente Franco <jupvfranco@google.com> Reviewed-by: Jaroslav Sevcik <jarin@chromium.org> Cr-Commit-Position: refs/heads/master@{#46967}
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- 26 Jul, 2017 1 commit
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Miran.Karic authored
The CL introduces optimizations in code generator to MipsTst, MipsCmp, MipsCmpS and MipsCmpD instructions for mips32 and Mips64Tst, Mips64Cmp, Mips64CmpS and Mips64CmpD for mips64. BUG= Change-Id: I6daf465e0ac7475691078b4d683da5247df6ea99 Reviewed-on: https://chromium-review.googlesource.com/584529Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Commit-Queue: Miran Karić <Miran.Karic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46892}
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- 24 Jul, 2017 1 commit
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Michael Starzinger authored
This switches the "code entry" field on JSFunction to no longer be an inner pointer into a Code object (i.e. to the start of the instruction stream), but a properly tagged pointer instead. Motivation behind this is the ability to treat this field regularly as part of escape analysis in the optimizing compiler. Also simplifies the object visitation for JSFunction objects. R=bmeurer@chromium.org Change-Id: Ib53a3fc5f3d783a6fed06dbcab319f5568632acc Reviewed-on: https://chromium-review.googlesource.com/577890 Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Yang Guo <yangguo@chromium.org> Reviewed-by: Michael Lippautz <mlippautz@chromium.org> Cr-Commit-Position: refs/heads/master@{#46844}
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- 20 Jul, 2017 2 commits
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Bill Budge authored
- Adds opcode for 32/16/8 bit dup instruction. - Matches shuffles that are equivalent to dup's. Bug: v8:6020 Change-Id: I8848d974adf30127d1dc31c09a9517f8f9573ce9 Reviewed-on: https://chromium-review.googlesource.com/571448 Commit-Queue: Bill Budge <bbudge@chromium.org> Reviewed-by: Martyn Capewell <martyn.capewell@arm.com> Reviewed-by: Mircea Trofin <mtrofin@chromium.org> Cr-Commit-Position: refs/heads/master@{#46803}
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Michael Starzinger authored
This removes support for dropping arguments adaptor frames as part of the JSFunction-to-JSFunction tail-call mechanism. The need for having dedicated {kArchTailCallJSFunctionFromJSFunction} instructions is gone. R=bmeurer@chromium.org BUG=v8:4698 Change-Id: Id3d35d06800bee68e06b9554c4315e6ad304de5f Reviewed-on: https://chromium-review.googlesource.com/575975Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#46782}
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- 17 Jul, 2017 1 commit
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Ivica Bogosavljevic authored
InstructionSelector::VisitInt32Mul TEST=cctest/test-run-machops/RunInt32MulAndInt32AddP,mjsunit/asm/int32mod-constant Bug: Change-Id: Iaccfc0d0c981e7c7e2f8b06ff3812fe60d1f85d3 Reviewed-on: https://chromium-review.googlesource.com/574367Reviewed-by: Miran Karić <Miran.Karic@imgtec.com> Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46707}
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- 14 Jul, 2017 1 commit
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Enrico Bacis authored
Returning a double from ToFloat64 could lead to problems. If value_ has the bit representation of a signaling NaN (sNaN), then returning it as double can cause the signaling bit to flip, and value_ is returned as a quiet NaN (qNaN). The usage of the Double wrapper also, makes the function ToFloat64AsInt redundant, since the Double wrapper already has the AsUint64() method, which returns an uint64_t. R=ahaas@chromium.org Change-Id: I1e627b97b2fb6110fc702fe58f2b83eb343e9ca2 Reviewed-on: https://chromium-review.googlesource.com/563215 Commit-Queue: Enrico Bacis <enricobacis@google.com> Reviewed-by: Martyn Capewell <martyn.capewell@arm.com> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#46680}
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- 13 Jul, 2017 2 commits
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Georg Neis authored
In debug mode (SLOW_DCHECK), Handle<T>::cast accesses the object to check its type. Obviously we can no longer do that now that we run on a background thread. NOTE: I think there are other parts of TF that suffer from the same problem. I will look into fixing those as well. Bug: v8:6048, v8:6590 Change-Id: I9abfdf30f1899cdb0c8b9078b0cf71463d608251 Reviewed-on: https://chromium-review.googlesource.com/570054Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Commit-Queue: Georg Neis <neis@chromium.org> Cr-Commit-Position: refs/heads/master@{#46641}
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Clemens Hammacher authored
There is just one version now, called IsPowerOfTwo. It accepts any integral type. There is one slight semantical change: Called with kMinInt, it previously returned true, because the argument was implicitly casted to an unsigned. It's now (correctly) returning false, so I had to add special handlings of kMinInt in machine-operator-reducer before calling IsPowerOfTwo on that value. R=mlippautz@chromium.org,mstarzinger@chromium.org,jgruber@chromium.org,ishell@chromium.org,yangguo@chromium.org Change-Id: Idc112a89034cdc8c03365b778b33b1c29fefb38d Reviewed-on: https://chromium-review.googlesource.com/568140Reviewed-by: Igor Sheludko <ishell@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by: Michael Lippautz <mlippautz@chromium.org> Reviewed-by: Yang Guo <yangguo@chromium.org> Commit-Queue: Clemens Hammacher <clemensh@chromium.org> Cr-Commit-Position: refs/heads/master@{#46627}
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- 12 Jul, 2017 1 commit
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Michael Starzinger authored
This introduces 2^16 as an upper limit for the allowed value range of a table switch on all architectures. It also fixes several overflows in the table size calculation. R=bmeurer@chromium.org TEST=mjsunit/regress/regress-crbug-736633 BUG=chromium:736633 Change-Id: I931bd226c99eb8a1ae1770c159fc314ff650bf57 Reviewed-on: https://chromium-review.googlesource.com/566829Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#46575}
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- 11 Jul, 2017 1 commit
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Georg Neis authored
Port https://chromium-review.googlesource.com/559674. R=bmeurer@chromium.org Bug: v8:6048 Change-Id: Ia419f174a342d19a8cbd3581b9cad6d24e0fbe19 Reviewed-on: https://chromium-review.googlesource.com/566834Reviewed-by: Michael Stanton <mvstanton@chromium.org> Commit-Queue: Georg Neis <neis@chromium.org> Cr-Commit-Position: refs/heads/master@{#46559}
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- 10 Jul, 2017 3 commits
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Ivica Bogosavljevic authored
Port 040fa06f Port 659e8f7b Bug: Change-Id: Ie08d65ff6647f8a15127a065e7224b5b5cec09a4 Reviewed-on: https://chromium-review.googlesource.com/558294 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Georg Neis <neis@chromium.org> Cr-Commit-Position: refs/heads/master@{#46525}
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Georg Neis authored
Port https://chromium-review.googlesource.com/c/519267/. R=bmeurer@chromium.org Bug: v8:6048 Change-Id: Ic94a12b30967fd26ebfa0c6752475d0c013f81e4 Reviewed-on: https://chromium-review.googlesource.com/565400Reviewed-by: Michael Stanton <mvstanton@chromium.org> Commit-Queue: Georg Neis <neis@chromium.org> Cr-Commit-Position: refs/heads/master@{#46514}
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Miran.Karic authored
The CL adds optimizations to MipsCtz and MipsPopcnt for mips32 and to Mips64Ctz, Mips64Dctz, Mips64Popcnt and Mips64Dpopcnt for mips64 in code generator. BUG= Change-Id: I080d4eca6b8521c3d01d727b883f3efa9876b7a1 Reviewed-on: https://chromium-review.googlesource.com/563197Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Commit-Queue: Miran Karić <Miran.Karic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46496}
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- 07 Jul, 2017 1 commit
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Georg Neis authored
This CL introduces TurboAssembler, a super-class of Assembler and sub-class of MacroAssembler. TurboAssembler contains all the functionality that is used by Turbofan and previously was part of MacroAssembler. TurboAssembler has access to the isolate but, in contrast to MacroAssembler, does not expect to be running on the main thread. Bug: v8:6048 Change-Id: If5693f56a45fe057e5011168e830d01a3f2f772d Reviewed-on: https://chromium-review.googlesource.com/559674Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Commit-Queue: Georg Neis <neis@chromium.org> Cr-Commit-Position: refs/heads/master@{#46477}
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- 03 Jul, 2017 1 commit
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Ilija Pavlovic authored
On Loongson 3A, MADD/MSUB instructions are actually fused MADD/MSUB and they can cause failure in some of the tests. Since this optimization is rarely used, and not used at all on MIPS64R6, MADD/MSUB instructions are removed from the source base. TEST= BUG= Change-Id: Ifbb5508a62731bb061f332864ffd1e210e97f963 Reviewed-on: https://chromium-review.googlesource.com/558066Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46387}
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- 28 Jun, 2017 1 commit
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Dusan Simicic authored
Add support for F32x4AddHoriz, I32x4AddHoriz, I16x8AddHoriz operations for mips32 and mips64 architectures. Bug: Change-Id: I5a40f23677418ffd81d4d5229203a439545575b8 Reviewed-on: https://chromium-review.googlesource.com/518016 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Mircea Trofin <mtrofin@chromium.org> Reviewed-by: Bill Budge <bbudge@chromium.org> Reviewed-by: Miran Karić <Miran.Karic@imgtec.com> Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46272}
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- 27 Jun, 2017 1 commit
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Dusan Simicic authored
Add support for I32x4SConvertI16x8Low, I32x4SConvertI16x8High, I32x4UConvertI16x8Low, I32x4UConvertI16x8High, I16x8SConvertI8x16Low, I16x8SConvertI8x16High,I16x8SConvertI32x4, I16x8UConvertI32x4, I16x8UConvertI8x16Low, I16x8UConvertI8x16High, I8x16SConvertI16x8, I8x16UConvertI16x8 operations for mips32 and mips64 architectures. Bug: Change-Id: I32f24956fc8e3c7df7f525bf0d4518161493a3ed Reviewed-on: https://chromium-review.googlesource.com/517500 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Mircea Trofin <mtrofin@chromium.org> Reviewed-by: Bill Budge <bbudge@chromium.org> Reviewed-by: Miran Karić <Miran.Karic@imgtec.com> Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46260}
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- 20 Jun, 2017 1 commit
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Dusan Simicic authored
Add support for S32x4Shuffle, S16x8Shuffle, S8x16Shuffle for mips and mips64 architectures. Bug: Change-Id: I2c062525ed94edfcb38a53f4bbef02131e313ba3 Reviewed-on: https://chromium-review.googlesource.com/531007 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Bill Budge <bbudge@chromium.org> Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Mircea Trofin <mtrofin@chromium.org> Cr-Commit-Position: refs/heads/master@{#46053}
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- 19 Jun, 2017 1 commit
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Georg Neis authored
... in order to avoid creating an OsrHelper during code assembly, because its constructor accesses the heap. Bug: v8:6048 Change-Id: I3bf592a5a0f91752a9f5ec35982f962445512bb7 Reviewed-on: https://chromium-review.googlesource.com/530370 Commit-Queue: Georg Neis <neis@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#45990}
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- 12 Jun, 2017 1 commit
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Georg Neis authored
MIPS port of https://chromium-review.googlesource.com/c/519165/. R=ivica.bogosavljevic@imgtec.com, jarin@chromium.org Bug: v8:6048 Change-Id: I27c8b43726119904441f286a6c97d602fd2d0150 Reviewed-on: https://chromium-review.googlesource.com/530806Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Commit-Queue: Georg Neis <neis@chromium.org> Cr-Commit-Position: refs/heads/master@{#45863}
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- 08 Jun, 2017 1 commit
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bbudge authored
- Eliminates b1x4, b1x8, and b1x16 as distinct WASM types. - All vector comparisons return v128 type. - Eliminates b1xN and, or, xor, not. - Selects take a v128 mask vector and are now bit-wise. - Adds a new test for Select, where mask is non-canonical (not 0's and -1's). LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2919203002 Cr-Commit-Position: refs/heads/master@{#45795}
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- 05 Jun, 2017 1 commit
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dusan.simicic authored
Macro-ization of Turbofan's SIMD Visitor methods in the same way it was done for ARM and x64 architectures. BUG= Review-Url: https://codereview.chromium.org/2910533003 Cr-Commit-Position: refs/heads/master@{#45704}
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- 01 Jun, 2017 1 commit
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dusan.simicic authored
Add support for S1x4And, S1x4Or, S1x4Xor, S1x4Not, S1x4AnyTrue, S1x4AllTrue, S1x8And, S1x8Or, S1x8Xor, S1x8Not, S1x8AnyTrue, S1x8AllTrue, S1x16And, S1x16Or, S1x16Xor, S1x16Not, S1x16AnyTrue, S1x16AllTrue, SimdLoad, SimdStore operations for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2801683003 Cr-Commit-Position: refs/heads/master@{#45662}
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- 24 May, 2017 1 commit
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dusan.simicic authored
Add support for I8x16Add, I8x16AddSaturateS, I8x16Sub, I8x16SubSaturateS, I8x16Mul, I8x16MaxS, I8x16MinS, I8x16Eq, I8x16Ne, I8x16LtS, I8x16LeS, I8x16ShrU, I8x16AddSaturateU, I8x16SubSaturateU, I8x16MaxU, I8x16MinU, I8x16LtU, I8x16LeU, S128And, S128Or, S128Xor, S128Not for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2798853003 Cr-Commit-Position: refs/heads/master@{#45512}
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- 22 May, 2017 1 commit
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Wiktor Garbacz authored
Change-Id: I20ed35a7fb5104a9cc66bb54fa8966589c43d7f9 Reviewed-on: https://chromium-review.googlesource.com/507287Reviewed-by: Andreas Haas <ahaas@chromium.org> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Daniel Clifford <danno@chromium.org> Reviewed-by: Jakob Gruber <jgruber@chromium.org> Reviewed-by: Marja Hölttä <marja@chromium.org> Reviewed-by: Jochen Eisinger <jochen@chromium.org> Commit-Queue: Wiktor Garbacz <wiktorg@google.com> Cr-Commit-Position: refs/heads/master@{#45458}
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- 21 May, 2017 1 commit
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gdeepti authored
Currently SIMD integer comparison ops are implemented using Lt/Le, this is sub-optimal on Intel, because all compares are done using pcmpgt(d/w/b) that clobber the destination register, and will need additional instructions to when using Lt/Le as the base implementation. This CL proposes moving to Gt/Ge as the underlying implementation as this will only require swapping operands on MIPS and is consistent with x86/ARM instructions. BUG=v8:6020 R=bbudge@chromium.org, bmeurer@chromium.org, bradnelson@chromium.org Review-Url: https://codereview.chromium.org/2874403002 Cr-Commit-Position: refs/heads/master@{#45440}
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- 16 May, 2017 1 commit
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ivica.bogosavljevic authored
Reland d8bfdb7a Original commit message: If alignment parameter is set, the memory returned by the StackSlot operator will be aligned according to the parameter. The implementation goes like this. If alignment parameter is set we allocate a bit more memory than actually needed and so we can move the beginning of the StackSlot in order to have it aligned. BUG= Review-Url: https://codereview.chromium.org/2874713003 Cr-Commit-Position: refs/heads/master@{#45339}
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- 15 May, 2017 1 commit
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dusan.simicic authored
Add support for I16x8Mul, I16x8MaxS, I16x8MinS, I16x8Eq, I16x8Ne, I16x8LtS, I16x8LeS, I16x8AddSaturateU, I16x8SubSaturateU, I16x8MaxU, I16x8MinU, I16x8LtU, I16x8LeU, I8x16Splat, I8x16ExtractLane, I8x16ReplaceLane, I8x16Neg, I8x16Shl, I8x16ShrS, S16x8Select, S8x16Select for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2791213003 Cr-Commit-Position: refs/heads/master@{#45312}
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- 12 May, 2017 1 commit
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ivica.bogosavljevic authored
Add Miran Karic and Dusan Simicic Remove Paul Lind, Gergely Kis, Akos Palfi, Balasz Kilvady and Dusan Milosavljevic NOTRY=true Review-Url: https://codereview.chromium.org/2881493003 Cr-Commit-Position: refs/heads/master@{#45273}
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- 10 May, 2017 1 commit
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Miran.Karic authored
Added support for DINSM and DINSU bit insertion instructions. Also fixed errors with bit extraction instructions, added disassembler tests and adjusted the code to make it more compact. BUG= TEST=cctest/test-assembler-mips/Dins cctest/test-disasm-mips/Type0 Review-Url: https://codereview.chromium.org/2871663002 Cr-Commit-Position: refs/heads/master@{#45226}
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- 09 May, 2017 2 commits
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machenbach authored
Revert of [turbofan] Add alignment parameter to StackSlot operator (patchset #7 id:120001 of https://codereview.chromium.org/2816743003/ ) Reason for revert: Seems to break cfi: https://build.chromium.org/p/client.v8/builders/V8%20Linux64%20-%20cfi/builds/9989 Original issue's description: > [turbofan] Add alignment parameter to StackSlot operator > > If alignment parameter is set, the memory returned by the > StackSlot operator will be aligned according to the parameter. > > The implementation goes like this. If alignment parameter is set > we allocate a bit more memory than actually needed and so we > can move the beginning of the StackSlot in order to have it aligned. > > > BUG= > > Review-Url: https://codereview.chromium.org/2816743003 > Cr-Commit-Position: refs/heads/master@{#45197} > Committed: https://chromium.googlesource.com/v8/v8/+/d8bfdb7a998adadc56aa5705a5998e75ceae7675 TBR=ahaas@chromium.org,clemensh@chromium.org,titzer@chromium.org,bmeurer@chromium.org,ivica.bogosavljevic@imgtec.com # Skipping CQ checks because original CL landed less than 1 days ago. NOPRESUBMIT=true NOTREECHECKS=true NOTRY=true BUG= Review-Url: https://codereview.chromium.org/2867403002 Cr-Commit-Position: refs/heads/master@{#45203}
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ivica.bogosavljevic authored
If alignment parameter is set, the memory returned by the StackSlot operator will be aligned according to the parameter. The implementation goes like this. If alignment parameter is set we allocate a bit more memory than actually needed and so we can move the beginning of the StackSlot in order to have it aligned. BUG= Review-Url: https://codereview.chromium.org/2816743003 Cr-Commit-Position: refs/heads/master@{#45197}
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- 04 May, 2017 1 commit
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dusan.simicic authored
Add support for I32x4Neg, I32x4LtS, I32x4LeS, I32x4LtU, I32x4LeU, I16x8Splat, I16x8ExtractLane, I16x8ReplaceLane, I16x8Neg, I16x8Shl, I16x8ShrS, I16x8ShrU, I16x8Add, I16x8AddSaturateS, I16x8Sub, I16x8SubSaturateS for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2795143003 Cr-Commit-Position: refs/heads/master@{#45092}
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