1. 10 Aug, 2016 2 commits
  2. 09 Aug, 2016 1 commit
  3. 08 Aug, 2016 1 commit
  4. 05 Aug, 2016 3 commits
  5. 01 Aug, 2016 1 commit
  6. 29 Jul, 2016 1 commit
    • bjaideep's avatar
      PPC: Set CodeRange constants correctly for PPC Linux · 9b4f8d19
      bjaideep authored
      The OS page size for PPC linux is 64KB. The page size for
      paged spaces on PPC linux is set to 4MB. kCodeRangeAreaAlignment
      is set to OS page size(64KB) and kMinimumCodeRangeSize is set to the
      size of 3 pages (12MB). This issue was exposed with testcase
      test-spaces/Regress3540 which used kMinimumCodeRangeSize.
      
      R=jochen@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com
      
      BUG=
      LOG=N
      
      Review-Url: https://codereview.chromium.org/2187833002
      Cr-Commit-Position: refs/heads/master@{#38180}
      9b4f8d19
  7. 27 Jul, 2016 2 commits
  8. 26 Jul, 2016 1 commit
    • benwells's avatar
      Revert of MIPS: Fix '[turbofan] Prevent storing signalling NaNs into holey... · 73a5db9d
      benwells authored
      Revert of MIPS: Fix '[turbofan] Prevent storing signalling NaNs into holey double arrays.' (patchset #2 id:20001 of https://codereview.chromium.org/2171303002/ )
      
      Reason for revert:
      This bug has an error in the toolchain.gypi file, the conditions clause is repeated. This has broken the DrMemory builder - see first failing chromium build https://build.chromium.org/p/chromium.memory.fyi/builders/Chromium%20Windows%20Builder%20%28DrMemory%29/builds/17857 which included a v8 roll.
      
      For reference the errors are:
      gyp: Key 'conditions' repeated at level 11 with key path 'target_defaults.conditions.6.1.target_conditions.0.1.conditions.0.1' while reading C:\b\build\slave\drm-cr\build\src\v8\gypfiles\toolchain.gypi while reading includes of C:\b\build\slave\drm-cr\build\src\v8\src\d8.gyp
      
      gyp: Key 'conditions' repeated at level 11 with key path 'target_defaults.conditions.6.1.target_conditions.0.1.conditions.0.1' while reading C:\b\build\slave\drm-cr\build\src\v8\gypfiles\toolchain.gypi while reading includes of C:\b\build\slave\drm-cr\build\src\v8\src\v8.gyp
      
      gyp: Key 'conditions' repeated at level 11 with key path 'target_defaults.conditions.6.1.target_conditions.0.1.conditions.0.1' while reading C:\b\build\slave\drm-cr\build\src\v8\gypfiles\toolchain.gypi while reading includes of C:\b\build\slave\drm-cr\build\src\v8\samples\samples.gyp
      
      Original issue's description:
      > MIPS: Fix '[turbofan] Prevent storing signalling NaNs into holey double arrays.'
      >
      > Port 6470ddad
      >
      > On MIPS different signaling NaN values must be used for hardware and simulator targets, even at snapshot generation when always simulator is used.
      >
      > Original commit message:
      > This introduces SilenceNaN operator, which makes sure that we only
      > store quiet NaNs into holey arrays. We omit the NaN silencing code
      > at instruction selection time if the input is an operation that
      > cannot possibly produce signalling NaNs.
      >
      > BUG=
      >
      > Committed: https://crrev.com/52f2ceb052f63324050c7a098e4398f510b54763
      > Cr-Commit-Position: refs/heads/master@{#38030}
      
      TBR=jarin@chromium.org,machenbach@google.com,akos.palfi@mattakis.com,ivica.bogosavljevic@imgtec.com,marija.antic@imgtec.com,ilija.pavlovic.imgtec@gmail.com,akos.palfi@imgtec.com,machenbach@chromium.org,balazs.kilvady@imgtec.com
      # Skipping CQ checks because original CL landed less than 1 days ago.
      NOPRESUBMIT=true
      NOTREECHECKS=true
      NOTRY=true
      BUG=
      
      TBR=machenbach
      
      Review-Url: https://codereview.chromium.org/2184573002
      Cr-Commit-Position: refs/heads/master@{#38037}
      73a5db9d
  9. 25 Jul, 2016 1 commit
  10. 19 Jul, 2016 1 commit
    • mstarzinger's avatar
      [turbofan] Allow deopt reasons without source positions. · ca727047
      mstarzinger authored
      This allows to pass deoptimization reasons to the profiler without the
      requirement of always providing a source position. The absence of deopt
      reasons is now communicated via a sentinel as the deopt id value. The
      deoptimization reasons recently added to TurboFan are now passed to the
      profiler.
      
      R=bmeurer@chromium.org
      TEST=cctest/test-cpu-profiler
      
      Review-Url: https://codereview.chromium.org/2159793002
      Cr-Commit-Position: refs/heads/master@{#37852}
      ca727047
  11. 18 Jul, 2016 1 commit
    • neis's avatar
      [modules] AST and parser rework. · 0e000a87
      neis authored
      Highlights:
      - Record all imports and exports in the ModuleDescriptor.
      - Remove ImportDeclaration; instead, introduce a new variable kind for imports.
      - Set name on default exported anonymous functions.
      
      Still to do: declaration of namespace imports.
      
      BUG=v8:1569
      
      Review-Url: https://codereview.chromium.org/2108193003
      Cr-Commit-Position: refs/heads/master@{#37815}
      0e000a87
  12. 14 Jul, 2016 1 commit
  13. 13 Jul, 2016 1 commit
  14. 30 Jun, 2016 1 commit
  15. 29 Jun, 2016 1 commit
  16. 27 Jun, 2016 1 commit
    • ssanfilippo's avatar
      This commit is the first step towards emitting unwinding information in · 7d073b03
      ssanfilippo authored
      the .eh_frame format as part of the jitdump generated when
      FLAG_perf_prof is enabled. The final goal is allowing precise unwinding
      of callchains that include JITted code when profiling V8 using perf.
      
      Unwinding information is stored in the body of code objects after the
      code itself, prefixed with its length and aligned to a 8-byte boundary.
      A boolean flag in the header signals its presence, resulting in zero
      memory overhead when the generation of unwinding info is disabled or
      no such information was attached to the code object.
      
      A new jitdump record type (with id 4) is introduced for specifying
      optional unwinding information for code load records. The EhFrameHdr
      struct is also introduced, together with a constructor to initialise it
      from the associated code object.
      
      At this stage no unwinding information is written to the jitdump, but
      the infrastructure for doing so is ready in place.
      
      BUG=v8:4899
      LOG=N
      
      Review-Url: https://codereview.chromium.org/1993653003
      Cr-Commit-Position: refs/heads/master@{#37296}
      7d073b03
  17. 22 Jun, 2016 1 commit
  18. 21 Jun, 2016 1 commit
  19. 13 Jun, 2016 1 commit
  20. 09 Jun, 2016 1 commit
    • ishell's avatar
      [ic] [stubs] Remove InlineCacheState field from the code flags. · 9dc62d27
      ishell authored
      There are no ICs left that store their state in this field: vector based
      ICs use feedback vector and the rest three (BinaryOpIC, CompareIC and
      ToBooleanIC) reconstruct their state from the ExtraICState field.
      
      This CL also removes unused InlineCacheState::DEBUG_STUB which was used
      mostly in Code::is_debug_stub(). The latter now checks if the code is one
      of the debug builtins instead.
      
      BUG=chromium:618701
      LOG=Y
      
      Review-Url: https://codereview.chromium.org/2052763003
      Cr-Commit-Position: refs/heads/master@{#36871}
      9dc62d27
  21. 08 Jun, 2016 1 commit
    • jkummerow's avatar
      Keep prototype maps in dictionary mode until ICs see them · be0494ba
      jkummerow authored
      Adding properties to prototypes is faster when we don't force their
      maps into fast mode yet. Once a prototype shows up in the IC system,
      its setup phase is likely over, and it makes sense to transition it
      to fast properties.
      This patch speeds up the microbenchmark in the bug by 20x.
      Octane-Typescript sees a 3% improvement.
      
      BUG=chromium:607010
      
      Review-Url: https://codereview.chromium.org/2036493006
      Cr-Commit-Position: refs/heads/master@{#36828}
      be0494ba
  22. 06 Jun, 2016 2 commits
  23. 03 Jun, 2016 1 commit
    • zhengxing.li's avatar
      X87: Temporary workaround for X87 FPU convert SNaN to QNaN automatically issue. · 22a73e0d
      zhengxing.li authored
        x87 FPU converts the SNaN to QNaN automatically when loading SNaN from memmory. This function caused v8 x87 port can't distinguish the
        Hole NaN (V8 used SNaN for it) from Javascript visible NaNs (V8 used QNaN for it).
      
        Many test cases failed in this function for v8 x87 port. It's a big effort to refactor all code of x87 FPU loads value from memmory to
        fix this issue.
      
        So here's a temporary workaround for it, what's this CL does are:
        1. Removed all previous x87 workaround of this issue.
        2. Used SNaN of MIPS which is a not used QNaN in v8 x87 port as the Hole NaN for v8 x87 port.
        3. This CL is only local to x87 port.
      
      BUG=
      
      Review-Url: https://codereview.chromium.org/2033133004
      Cr-Commit-Position: refs/heads/master@{#36697}
      22a73e0d
  24. 02 Jun, 2016 1 commit
  25. 01 Jun, 2016 4 commits
  26. 19 May, 2016 2 commits
  27. 18 May, 2016 1 commit
  28. 17 May, 2016 1 commit
  29. 16 May, 2016 1 commit
  30. 03 May, 2016 2 commits