- 21 Dec, 2017 1 commit
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Andreas Haas authored
This is the implementation of crrev.com/c/766371 for mips. Original description: Add the ability to return (multiple) return values on the stack: - Extend stack frames with a new buffer region for return slots. This region is located at the end of a caller's frame such that its slots can be indexed as caller frame slots in a callee (located beyond its parameters) and assigned return values. - Adjust stack frame constructon and deconstruction accordingly. - Extend linkage computation to support register plus stack returns. - Reserve return slots in caller frame when respective calls occur. - Introduce and generate architecture instructions ('peek') for reading back results from return slots in the caller. - Aggressive tests. - Some minor clean-up. R=v8-mips-ports@googlegroups.com Change-Id: I2f30cc297771ec74b0b935b6ea28d3d61a986d5c Reviewed-on: https://chromium-review.googlesource.com/839660Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@mips.com> Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@mips.com> Commit-Queue: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#50272}
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- 28 Jun, 2017 1 commit
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Dusan Simicic authored
Add support for F32x4AddHoriz, I32x4AddHoriz, I16x8AddHoriz operations for mips32 and mips64 architectures. Bug: Change-Id: I5a40f23677418ffd81d4d5229203a439545575b8 Reviewed-on: https://chromium-review.googlesource.com/518016 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Mircea Trofin <mtrofin@chromium.org> Reviewed-by: Bill Budge <bbudge@chromium.org> Reviewed-by: Miran Karić <Miran.Karic@imgtec.com> Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46272}
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- 27 Jun, 2017 1 commit
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Dusan Simicic authored
Add support for I32x4SConvertI16x8Low, I32x4SConvertI16x8High, I32x4UConvertI16x8Low, I32x4UConvertI16x8High, I16x8SConvertI8x16Low, I16x8SConvertI8x16High,I16x8SConvertI32x4, I16x8UConvertI32x4, I16x8UConvertI8x16Low, I16x8UConvertI8x16High, I8x16SConvertI16x8, I8x16UConvertI16x8 operations for mips32 and mips64 architectures. Bug: Change-Id: I32f24956fc8e3c7df7f525bf0d4518161493a3ed Reviewed-on: https://chromium-review.googlesource.com/517500 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Mircea Trofin <mtrofin@chromium.org> Reviewed-by: Bill Budge <bbudge@chromium.org> Reviewed-by: Miran Karić <Miran.Karic@imgtec.com> Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46260}
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- 20 Jun, 2017 1 commit
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Dusan Simicic authored
Add support for S32x4Shuffle, S16x8Shuffle, S8x16Shuffle for mips and mips64 architectures. Bug: Change-Id: I2c062525ed94edfcb38a53f4bbef02131e313ba3 Reviewed-on: https://chromium-review.googlesource.com/531007 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Bill Budge <bbudge@chromium.org> Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Mircea Trofin <mtrofin@chromium.org> Cr-Commit-Position: refs/heads/master@{#46053}
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- 08 Jun, 2017 1 commit
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bbudge authored
- Eliminates b1x4, b1x8, and b1x16 as distinct WASM types. - All vector comparisons return v128 type. - Eliminates b1xN and, or, xor, not. - Selects take a v128 mask vector and are now bit-wise. - Adds a new test for Select, where mask is non-canonical (not 0's and -1's). LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2919203002 Cr-Commit-Position: refs/heads/master@{#45795}
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- 01 Jun, 2017 1 commit
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dusan.simicic authored
Add support for S1x4And, S1x4Or, S1x4Xor, S1x4Not, S1x4AnyTrue, S1x4AllTrue, S1x8And, S1x8Or, S1x8Xor, S1x8Not, S1x8AnyTrue, S1x8AllTrue, S1x16And, S1x16Or, S1x16Xor, S1x16Not, S1x16AnyTrue, S1x16AllTrue, SimdLoad, SimdStore operations for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2801683003 Cr-Commit-Position: refs/heads/master@{#45662}
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- 24 May, 2017 1 commit
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dusan.simicic authored
Add support for I8x16Add, I8x16AddSaturateS, I8x16Sub, I8x16SubSaturateS, I8x16Mul, I8x16MaxS, I8x16MinS, I8x16Eq, I8x16Ne, I8x16LtS, I8x16LeS, I8x16ShrU, I8x16AddSaturateU, I8x16SubSaturateU, I8x16MaxU, I8x16MinU, I8x16LtU, I8x16LeU, S128And, S128Or, S128Xor, S128Not for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2798853003 Cr-Commit-Position: refs/heads/master@{#45512}
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- 21 May, 2017 1 commit
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gdeepti authored
Currently SIMD integer comparison ops are implemented using Lt/Le, this is sub-optimal on Intel, because all compares are done using pcmpgt(d/w/b) that clobber the destination register, and will need additional instructions to when using Lt/Le as the base implementation. This CL proposes moving to Gt/Ge as the underlying implementation as this will only require swapping operands on MIPS and is consistent with x86/ARM instructions. BUG=v8:6020 R=bbudge@chromium.org, bmeurer@chromium.org, bradnelson@chromium.org Review-Url: https://codereview.chromium.org/2874403002 Cr-Commit-Position: refs/heads/master@{#45440}
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- 15 May, 2017 1 commit
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dusan.simicic authored
Add support for I16x8Mul, I16x8MaxS, I16x8MinS, I16x8Eq, I16x8Ne, I16x8LtS, I16x8LeS, I16x8AddSaturateU, I16x8SubSaturateU, I16x8MaxU, I16x8MinU, I16x8LtU, I16x8LeU, I8x16Splat, I8x16ExtractLane, I8x16ReplaceLane, I8x16Neg, I8x16Shl, I8x16ShrS, S16x8Select, S8x16Select for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2791213003 Cr-Commit-Position: refs/heads/master@{#45312}
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- 04 May, 2017 1 commit
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dusan.simicic authored
Add support for I32x4Neg, I32x4LtS, I32x4LeS, I32x4LtU, I32x4LeU, I16x8Splat, I16x8ExtractLane, I16x8ReplaceLane, I16x8Neg, I16x8Shl, I16x8ShrS, I16x8ShrU, I16x8Add, I16x8AddSaturateS, I16x8Sub, I16x8SubSaturateS for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2795143003 Cr-Commit-Position: refs/heads/master@{#45092}
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- 21 Apr, 2017 1 commit
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bbudge authored
These can be synthesized from existing operations and scheduled for better performance than if we have to generate blocks of instructions that take many cycles to complete. - Remove F32x4RecipRefine, F32x4RecipSqrtRefine. Clients are better off synthesizing these from splats, multiplies and adds. - Remove F32x4Div, F32x4Sqrt, F32x4MinNum, F32x4MaxNum. Clients are better off synthesizing these or using the reciprocal approximations, possibly with a refinement step. LOG=N BUG=v8:6020 Review-Url: https://codereview.chromium.org/2827143002 Cr-Commit-Position: refs/heads/master@{#44784}
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- 12 Apr, 2017 1 commit
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dusan.simicic authored
Add support for F32x4Abs, F32x4Neg, F32x4RecipApprox, F32x4RecipRefine, F32x4RecipSqrtApprox, F32x4RecipSqrtRefine, F32x4Add, F32x4Sub, F32x4Mul, F32x4Max, F32x4Min, F32x4Eq, F32x4Ne, F32x4Lt, F32x4Le, I32x4SConvertF32x4, I32x4UConvertF32x4 operations for mips32 and mips64 architectures. BUG= Review-Url: https://codereview.chromium.org/2778203002 Cr-Commit-Position: refs/heads/master@{#44597}
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- 11 Apr, 2017 1 commit
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dusan.simicic authored
Add support for I32x4Mul, I32x4MaxS, I32x4MinS, I32x4Eq, I32x4Ne, I32x4Shl, I32x4ShrS, I32x4ShrU, I32x4MaxU, I32x4MinU, S32x4Select operations for mips32 and mips64 architectures BUG= Review-Url: https://codereview.chromium.org/2780713003 Cr-Commit-Position: refs/heads/master@{#44559}
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- 04 Apr, 2017 1 commit
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dusan.simicic authored
Add support for F32x4Splat, F32x4ExtractLane, F32x4ReplaceLane, F32x4SConvertI32x4, F32x4UConvertI32x4 operations for mips32 and mips64 architectures. BUG= Note: Depends on https://codereview.chromium.org/2753903004/ Review-Url: https://codereview.chromium.org/2780503002 Cr-Commit-Position: refs/heads/master@{#44359}
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- 03 Apr, 2017 1 commit
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dusan.simicic authored
Adds support for I32x4Splat, I32x4ExtractLane, I32x4ReplaceLane, I32x4Add, I32x4Sub, S128Zero operations for mips32 and mips64 architectures. BUG= Note: Depends on patch: https://codereview.chromium.org/2740123004/ Review-Url: https://codereview.chromium.org/2753903004 Cr-Commit-Position: refs/heads/master@{#44326}
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- 15 Dec, 2016 1 commit
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ivica.bogosavljevic authored
MIPS[64]R6 supports only fusion multiply-accumulate instructions, and using these causes failures of several tests that expect exact floating-point results. Therefore we disable fusion multiply-accumulate in both emitted and compiled code on R6. TEST=cctest/test-run-machops/RunFloat64MulAndFloat64Add1,mjsunit/es6/math-expm1.js mjsunit/es6/math-fround.js,mjsunit/compiler/multiply-add.js BUG= Review-Url: https://codereview.chromium.org/2569683002 Cr-Commit-Position: refs/heads/master@{#41717}
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- 22 Sep, 2016 1 commit
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Ilija.Pavlovic authored
Port for VisitFloat32Add, VisitFloat64Add, VisitFloat32Sub and VisitFloat64Sub in InstructionSelector. TEST=unittests/InstructionSelectorTest.Float32AddWithFloat32Mul, unittests/InstructionSelectorTest.Float64AddWithFloat64Mul, unittests/InstructionSelectorTest.Float32SubWithFloat32Mul, unittests/InstructionSelectorTest.Float64SubWithFloat64Mul BUG= Review-Url: https://codereview.chromium.org/2341303002 Cr-Commit-Position: refs/heads/master@{#39616}
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- 21 Sep, 2016 1 commit
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marija.antic authored
Port of https://crrev.com/14a5c18cc35b2c55b37de3bd0ad27941cf21cb68 BUG= Review-Url: https://codereview.chromium.org/2355743003 Cr-Commit-Position: refs/heads/master@{#39582}
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- 22 Aug, 2016 1 commit
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ahaas authored
The new operators are implemented similar to the Float64(Max|Min) which already exist. The purpose of the new operators is the implementation of the F32Max and F32Min instructions in WebAssembly. R=titzer@chromium.org, v8-arm-ports@googlegroups.com, v8-mips-ports@googlegroups.com Review-Url: https://codereview.chromium.org/2252863003 Cr-Commit-Position: refs/heads/master@{#38784}
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- 16 Aug, 2016 1 commit
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ivica.bogosavljevic authored
Port 77c9cb83. Original commit message: This commit fixes wasm little-endian load issue on big-endian platform by introducing reverse byte operation immediately after a load. BUG= Review-Url: https://codereview.chromium.org/2235703002 Cr-Commit-Position: refs/heads/master@{#38660}
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- 08 Aug, 2016 1 commit
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ahaas authored
This CL changes the semantics of FloatXXSub to match the semantics of the semantics of FloatXXSubPreserveNan. Therefore there is no need anymore for the FloatXXSubPreserveNan operators. The optimizations in VisitFloatXXSub which are removed in this CL have already been moved to machine-operator-reducer.cc in https://codereview.chromium.org/2226663002 R=bmeurer@chromium.org Review-Url: https://codereview.chromium.org/2220973002 Cr-Commit-Position: refs/heads/master@{#38437}
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- 05 Aug, 2016 1 commit
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ahaas authored
R=bmeurer@chromium.org Review-Url: https://codereview.chromium.org/2215403002 Cr-Commit-Position: refs/heads/master@{#38399}
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- 22 Jul, 2016 2 commits
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ivica.bogosavljevic authored
Implement UnalignedLoad and UnalignedStore optional turbofan operators and use them in WasmCompiler for unaligned memory access. BUG= Review-Url: https://codereview.chromium.org/2122853002 Cr-Commit-Position: refs/heads/master@{#37988}
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bmeurer authored
So far we don't have a useful way to inline Math.max or Math.min in TurboFan optimized code. This adds new operators NumberMax and NumberMin and changes the Float64Max/Float64Min operators to have JavaScript semantics instead of the C++ semantics that it had previously. This also removes support for recognizing the tenary case in the CommonOperatorReducer, since that doesn't seem to have any positive impact (and actually doesn't show up in regular JavaScript, where people use Math.max/Math.min instead). Drive-by-fix: Also nuke the unused Float32Max/Float32Min operators. R=jarin@chromium.org Review-Url: https://codereview.chromium.org/2170343002 Cr-Commit-Position: refs/heads/master@{#37971}
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- 14 Jul, 2016 1 commit
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mvstanton authored
BUG= Review-Url: https://codereview.chromium.org/2101123005 Cr-Commit-Position: refs/heads/master@{#37748}
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- 20 Jun, 2016 1 commit
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balazs.kilvady authored
MIPS: Followup '[turbofan] Introduce new operators Float32SubPreserveNan and Float64SubPreserveNan'. Port 481502da Float32SubMinusZero and Float64SubMinusZero tests are failing because MIPS does not preserve NaN payload according to Wasm spec. Implemented macro-assembler methods that check for NaN operands, and return the qNaN value with preserved payload and sign bits. TEST=cctest/test-run-wasm/Run_WasmFloat32SubMinusZero, cctest/test-run-wasm/Run_WasmFloat64SubMinusZero BUG= patch from issue 2019693002 at patchset 140001 (http://crrev.com/2019693002#ps140001) R=ahaas@chromium.org Review-Url: https://codereview.chromium.org/2066483008 Cr-Commit-Position: refs/heads/master@{#37105}
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- 14 Jun, 2016 1 commit
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jarin authored
This introduces SilenceNaN operator, which makes sure that we only store quiet NaNs into holey arrays. We omit the NaN silencing code at instruction selection time if the input is an operation that cannot possibly produce signalling NaNs. BUG= Review-Url: https://codereview.chromium.org/2060233002 Cr-Commit-Position: refs/heads/master@{#36950}
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- 10 Jun, 2016 1 commit
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bmeurer authored
This switches Math.log to use an fdlibm based version of log, imported as base::ieee754::log, and use that consistently everywhere, i.e. change the Float64Log TurboFan operators on Intel to use the C++ implementation as well (same for Crankshaft). R=yangguo@chromium.org BUG=v8:5065,v8:5086 Review-Url: https://codereview.chromium.org/2053893003 Cr-Commit-Position: refs/heads/master@{#36880}
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- 03 Jun, 2016 1 commit
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bmeurer authored
Introduce a dedicated Float64Log machine operator, that is either implemented by a direct C call or by platform specific code, i.e. using the FPU on x64 and ia32. This operator is used to implement Math.log as a proper TurboFan builtin on top of the CodeStubAssembler. Also introduce a NumberLog simplified operator on top of Float64Log and use that for the fast inline path of Math.log inside TurboFan optimized code. BUG=v8:5065 Review-Url: https://codereview.chromium.org/2029413005 Cr-Commit-Position: refs/heads/master@{#36703}
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- 06 Apr, 2016 2 commits
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1859143002 Cr-Commit-Position: refs/heads/master@{#35309}
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marija.antic authored
Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ https://codereview.chromium.org/1842013002/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= Review URL: https://codereview.chromium.org/1819383002 Cr-Commit-Position: refs/heads/master@{#35307}
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- 05 Apr, 2016 1 commit
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marija.antic authored
Port 40bdbef9 Implement Int32MulPair operator for MIPS. BUG= Review URL: https://codereview.chromium.org/1848253002 Cr-Commit-Position: refs/heads/master@{#35256}
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- 18 Feb, 2016 2 commits
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akos.palfi authored
Port 187b3f28 BUG= Review URL: https://codereview.chromium.org/1709793002 Cr-Commit-Position: refs/heads/master@{#34130}
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akos.palfi authored
Port 2166bd8c BUG= Review URL: https://codereview.chromium.org/1708853002 Cr-Commit-Position: refs/heads/master@{#34112}
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- 27 Jan, 2016 1 commit
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marija.antic authored
Implement the optional turbofan operators Word32Ctz, Word64Ctz, Word32Popcnt and Word64Popcnt. BUG= Review URL: https://codereview.chromium.org/1588383002 Cr-Commit-Position: refs/heads/master@{#33555}
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- 18 Dec, 2015 1 commit
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dusan.m.milosavljevic authored
TEST=unittests/InstructionSelectorTest.CombineChangeFloat32ToInt32WithRoundFloat32, ChangeFloat64ToInt32OfChangeFloat32ToFloat64, TruncateFloat64ToFloat32OfChangeInt32ToFloat64 BUG= Review URL: https://codereview.chromium.org/1520503002 Cr-Commit-Position: refs/heads/master@{#32969}
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- 07 Dec, 2015 1 commit
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dusan.m.milosavljevic authored
TEST=unittests/InstructionSlectorTest.CombineChangeFloat64ToInt32WithRoundFloat64 BUG= Review URL: https://codereview.chromium.org/1510493002 Cr-Commit-Position: refs/heads/master@{#32668}
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- 01 Dec, 2015 1 commit
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dusan.m.milosavljevic authored
TEST=unittests/InstructionSelectorTest.Word(32|64)AndToClearBits BUG= Review URL: https://codereview.chromium.org/1485023004 Cr-Commit-Position: refs/heads/master@{#32479}
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- 26 Nov, 2015 1 commit
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dusan.m.milosavljevic authored
TEST= BUG= Review URL: https://codereview.chromium.org/1477043004 Cr-Commit-Position: refs/heads/master@{#32347}
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- 20 Nov, 2015 1 commit
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dusan.m.milosavljevic authored
TEST=unittests/InstructionSelectorTest.Word32XorMinusOneWithWord32Or, Word64XorMinusOneWithWord64Or BUG= Review URL: https://codereview.chromium.org/1459723002 Cr-Commit-Position: refs/heads/master@{#32149}
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