- 22 Jul, 2020 3 commits
-
-
Maya Lekova authored
This reverts commit 06bdd8d6. Reason for revert: Speculative revert for arm64 sim CFI - https://ci.chromium.org/p/v8/builders/ci/V8%20Linux%20-%20arm64%20-%20sim%20-%20CFI/1474? Original change's description: > [liftoff][tail-call] Add indirect tail calls > > R=clemensb@chromium.org > > Bug: v8:10693 > Change-Id: Ic71d873bf7099ba671b9db1e87392d54aeebd7cf > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2312096 > Reviewed-by: Clemens Backes <clemensb@chromium.org> > Commit-Queue: Thibaud Michaud <thibaudm@chromium.org> > Cr-Commit-Position: refs/heads/master@{#68996} TBR=clemensb@chromium.org,thibaudm@chromium.org Change-Id: Ibdc64e20247758fb6bc96b4e5d13406adab968a7 No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:10693 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2312786Reviewed-by: Maya Lekova <mslekova@chromium.org> Commit-Queue: Maya Lekova <mslekova@chromium.org> Cr-Commit-Position: refs/heads/master@{#69003}
-
Thibaud Michaud authored
R=clemensb@chromium.org Bug: v8:10693 Change-Id: Ic71d873bf7099ba671b9db1e87392d54aeebd7cf Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2312096Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Thibaud Michaud <thibaudm@chromium.org> Cr-Commit-Position: refs/heads/master@{#68996}
-
Thibaud Michaud authored
R=clemensb@chromium.org Bug: v8:10693 Change-Id: I2ffc99bfb9e96afd740fc1a095ccca61b7c5ce19 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2289970 Commit-Queue: Thibaud Michaud <thibaudm@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68990}
-
- 17 Jul, 2020 1 commit
-
-
Clemens Backes authored
The {operator==} on {VarState} did not check the spill offset, so when merging stack states, we forgot to move stack values if both source and destination were stack slots, but at different offsets. This CL fixes this by removing the {operator==}, because the semantics (and use) are not clear, and it's only used in one place anyway. The equality check was mostly redundant, so inlining it also makes the code smaller and faster. R=ahaas@chromium.org Bug: v8:10702 Change-Id: I6c8b2cfd1002274175c9a17d305692e4631fd7dc Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2304574Reviewed-by: Andreas Haas <ahaas@chromium.org> Commit-Queue: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68916}
-
- 10 Jul, 2020 1 commit
-
-
Clemens Backes authored
We often want to pass a list of moves of fixed length. Instead of constructing an array on the caller's stack and passing it via {ArrayVector}, we should just pass it via {std::initializer_list}. This also avoids to spell out the internal name {LiftoffAssembler::ParallelRegisterMoveTuple}. R=thibaudm@chromium.org Bug: v8:10576 Change-Id: Ibe7ac5a5a02686533333cb45652cbb2b99ad9c60 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2287498 Commit-Queue: Clemens Backes <clemensb@chromium.org> Reviewed-by: Thibaud Michaud <thibaudm@chromium.org> Cr-Commit-Position: refs/heads/master@{#68799}
-
- 09 Jul, 2020 2 commits
-
-
Ng Zhi An authored
Partial implementation of v128.const, only the optimized case for all 0s and all 1s. The other cases bailout to TurboFan for now, and will be added in subsequent patches. Bug: v8:9909 Change-Id: I3240c1c5f4259c45d51edca00fec37047bc1b3a5 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2284212 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68772}
-
Clemens Backes authored
For 64-bit binary operations, Liftoff on arm made the assumption that register pairs are always ordered, i.e. the register code for the low word is lower than the register code for the high word. Ensuring this was only implemented in {GetUnusedRegister} in https://crrev.com/c/2168875. Other cases were missing though, e.g. return values, but also different places were we construct register pairs internally. Thus, this CL removes this constraint again and instead handles unordered register pairs in 64-bit binary operations on arm. R=thibaudm@chromium.org Bug: chromium:1101304 Change-Id: I4cd9fb1577f82ab06d34c9dde6533cf04a2cade7 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2287870Reviewed-by: Thibaud Michaud <thibaudm@chromium.org> Commit-Queue: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68752}
-
- 26 Jun, 2020 1 commit
-
-
Clemens Backes authored
Each single branch in the switch was push a new value on the operand stack, but the code for that was not shared. This CL refactors this such that we only allocate once, and then modify the new slot as needed. This makes the generated code a lot smaller (771 bytes instead of 1052 bytes on x64), and hopefully also faster. R=thibaudm@chromium.org Bug: v8:10576 Change-Id: I65cd5b7d91f881b4c236414d39f1dfd54e200b97 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2266533 Commit-Queue: Clemens Backes <clemensb@chromium.org> Reviewed-by: Thibaud Michaud <thibaudm@chromium.org> Cr-Commit-Position: refs/heads/master@{#68554}
-
- 25 Jun, 2020 1 commit
-
-
Thibaud Michaud authored
- Add a separate function to load return slots, instead of encoding this in the offset, - Add fast path for single return. Drive-by: Reuse helper function for stack slot loads on ia32 and x64. R=clemensb@chromium.org Bug: v8:10576 Change-Id: Iea5ad2f0982c443cf2297227e9a2367cbb14581f Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2264099Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Thibaud Michaud <thibaudm@chromium.org> Cr-Commit-Position: refs/heads/master@{#68535}
-
- 10 Jun, 2020 1 commit
-
-
Clemens Backes authored
{PopToRegister} will most likely find that the stack slot is already holding a register (89% of cases on epic). Thus put the fast path for this in the header, so it can be inlined. Also, {GetUnusedRegister} will mostly find an unused register (95% on epic). Hence, make sure that the code for spilling a register is not inlined. Drive-by: Avoid the call to {LoadToRegister} if we already checked before if the slot is holding a register. R=thibaudm@chromium.org Bug: v8:10576 Change-Id: I13797fa5c12c5359f2578a4dbebb63aa50c00e60 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2237144 Commit-Queue: Clemens Backes <clemensb@chromium.org> Reviewed-by: Thibaud Michaud <thibaudm@chromium.org> Cr-Commit-Position: refs/heads/master@{#68280}
-
- 06 Jun, 2020 1 commit
-
-
Zhou, Zhiguo authored
Bug: v8:9909 Change-Id: I99c599ac1d872a8b4e7c154a942026b52ecb0bd5 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2219688 Commit-Queue: Zhiguo Zhou <zhiguo.zhou@intel.com> Reviewed-by: Clemens Backes <clemensb@chromium.org> Reviewed-by: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#68220}
-
- 03 Jun, 2020 1 commit
-
-
Arnaud Robin authored
Added return value display when tracing function calls in wasm. The new types handled are I32, I64, F32 and F64. Only single return value is handled. R=clemensb@chromium.org Bug: v8:10559 Change-Id: I726d08fcfdc8bf2c3e43a25ec1932412ff74387b Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2225024Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Arnaud Robin <arobin@google.com> Cr-Commit-Position: refs/heads/master@{#68143}
-
- 02 Jun, 2020 2 commits
-
-
Ng Zhi An authored
Making them private was a way to hide the constructor, we can explicitly delete them, which give a better compilation error message as well. Also see: https://stackoverflow.com/q/55205874 Bug: v8:10488 Change-Id: I624efdb03edb4d1d07f95e756f2c87baba4b3ffe Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2223236Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#68121}
-
Ng Zhi An authored
This relands commit d04b5e47. The fix here is in the assembler for pmovmskb, emit_optional_rex_32 should be called after emitting the prefix byte. Original change's description: > [wasm-simd][liftoff][ia32][x64] Implement bitmask > > Implements i8x16 i16x8 i32x4 bitmask. > > This was merged into the proposal in > https://github.com/WebAssembly/simd/pull/201/. > > Bug: v8:9909,v8:10308 > Change-Id: I882f0c2697213cdf593e745112e0897cee252009 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2222607 > Commit-Queue: Zhi An Ng <zhin@chromium.org> > Reviewed-by: Clemens Backes <clemensb@chromium.org> > Cr-Commit-Position: refs/heads/master@{#68090} Bug: v8:9909, v8:10308 Change-Id: I4897585c86b87f72dc8f142b275171276d135a24 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2225090Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#68106}
-
- 01 Jun, 2020 2 commits
-
-
Francis McCabe authored
This reverts commit d04b5e47. Reason for revert: closed the tree with a simd related test failure: https://ci.chromium.org/p/v8/builders/ci/V8%20Linux64/37487? Original change's description: > [wasm-simd][liftoff][ia32][x64] Implement bitmask > > Implements i8x16 i16x8 i32x4 bitmask. > > This was merged into the proposal in > https://github.com/WebAssembly/simd/pull/201/. > > Bug: v8:9909,v8:10308 > Change-Id: I882f0c2697213cdf593e745112e0897cee252009 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2222607 > Commit-Queue: Zhi An Ng <zhin@chromium.org> > Reviewed-by: Clemens Backes <clemensb@chromium.org> > Cr-Commit-Position: refs/heads/master@{#68090} TBR=clemensb@chromium.org,zhin@chromium.org Change-Id: I2e090f92d84b8f7d8bbf0725a4f64efaa18f3c65 No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:9909, v8:10308 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2223829Reviewed-by: Francis McCabe <fgm@chromium.org> Commit-Queue: Francis McCabe <fgm@chromium.org> Cr-Commit-Position: refs/heads/master@{#68091}
-
Ng Zhi An authored
Implements i8x16 i16x8 i32x4 bitmask. This was merged into the proposal in https://github.com/WebAssembly/simd/pull/201/. Bug: v8:9909,v8:10308 Change-Id: I882f0c2697213cdf593e745112e0897cee252009 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2222607 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68090}
-
- 29 May, 2020 1 commit
-
-
Ng Zhi An authored
Implement all v8x16 v16x8 v32x4 all_true on ia32 and x64. arm and arm64 bailout for now, will be implemented later. Bug: v8:9909 Change-Id: Icea38c00e33b387191e000b64100251525d8f8da Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2220446 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68077}
-
- 27 May, 2020 3 commits
-
-
Ng Zhi An authored
Implementation for ia32 and x64, arm and arm64 simply bailout now, will be implemented later. Bug: v8:9909 Change-Id: Ieea02baeb68f5c947d1182450f9f80c3e19e07ca Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2216930 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68025}
-
Ng Zhi An authored
Implemented for ia32, x64, arm, arm64, all in one patch (phew). The code is simple enough (short paragraph) that are the same as TurboFan codegen. Bug: v8:9909 Change-Id: Idbc1cbd58c16e455b1656c2367c8d9db10308e35 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2208610 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68022}
-
Kong, Fanchen authored
Bug: v8:9909 Change-Id: I6224ce9ae3ac814ee33be71a67f1df02a398e0c5 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2208686 Commit-Queue: Fanchen Kong <fanchen.kong@intel.com> Reviewed-by: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#68001}
-
- 20 May, 2020 1 commit
-
-
Ng Zhi An authored
This is a reland of dd19a400 Original change's description: > [wasm-simd][liftoff][x64][ia32] Implement load extend > > The operations are implemented: > > - i16x8.load8x8_s > - i16x8.load8x8_u > - i32x4.load16x4_s > - i32x4.load16x4_u > - i64x2.load32x2_s > - i64x2.load32x2_u > > on x64 and i32. The rest of the arch currently bail out, and will be > implemented in subsequent patches. > > The liftoff-compiler.cc code looks very similar to the one for LoadMem, > the only difference is special handling of kSplat v.s. kExtend. kExtend > always loads 8 bytes, so the bounds check and tracing is different. > Compared to LoadMem there is less need for pinning, since the result is > always going to be in a SIMD/FP register, which is different from the > index/addr register. > > The enum LoadTransformationKind was moved from > function-body-decoder-impl.h to function-body-decoder.h so that no > unncessary header file inclusions were needed to liftoff, and also it's > a better place for it to live. > > Bug: v8:9909 > Change-Id: I926bcc01c0c3c860223e8c08f91bc4ab3b75c399 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2203730 > Commit-Queue: Zhi An Ng <zhin@chromium.org> > Reviewed-by: Clemens Backes <clemensb@chromium.org> > Cr-Commit-Position: refs/heads/master@{#67914} Bug: v8:9909 Change-Id: Ic1d8dcc00d9c5af0d51100a947161eaa315b7659 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2209268Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#67930}
-
- 19 May, 2020 2 commits
-
-
Zhi An Ng authored
This reverts commit dd19a400. Reason for revert: https://ci.chromium.org/p/v8/builders/ci/V8%20Linux%20-%20debug/30448? Original change's description: > [wasm-simd][liftoff][x64][ia32] Implement load extend > > The operations are implemented: > > - i16x8.load8x8_s > - i16x8.load8x8_u > - i32x4.load16x4_s > - i32x4.load16x4_u > - i64x2.load32x2_s > - i64x2.load32x2_u > > on x64 and i32. The rest of the arch currently bail out, and will be > implemented in subsequent patches. > > The liftoff-compiler.cc code looks very similar to the one for LoadMem, > the only difference is special handling of kSplat v.s. kExtend. kExtend > always loads 8 bytes, so the bounds check and tracing is different. > Compared to LoadMem there is less need for pinning, since the result is > always going to be in a SIMD/FP register, which is different from the > index/addr register. > > The enum LoadTransformationKind was moved from > function-body-decoder-impl.h to function-body-decoder.h so that no > unncessary header file inclusions were needed to liftoff, and also it's > a better place for it to live. > > Bug: v8:9909 > Change-Id: I926bcc01c0c3c860223e8c08f91bc4ab3b75c399 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2203730 > Commit-Queue: Zhi An Ng <zhin@chromium.org> > Reviewed-by: Clemens Backes <clemensb@chromium.org> > Cr-Commit-Position: refs/heads/master@{#67914} TBR=clemensb@chromium.org,zhin@chromium.org Change-Id: I2af6dfe6cd163d0dbc9f3a5ad4bfc5e622e76b63 No-Presubmit: true No-Tree-Checks: true No-Try: true Bug: v8:9909 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2207665Reviewed-by: Zhi An Ng <zhin@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#67915}
-
Ng Zhi An authored
The operations are implemented: - i16x8.load8x8_s - i16x8.load8x8_u - i32x4.load16x4_s - i32x4.load16x4_u - i64x2.load32x2_s - i64x2.load32x2_u on x64 and i32. The rest of the arch currently bail out, and will be implemented in subsequent patches. The liftoff-compiler.cc code looks very similar to the one for LoadMem, the only difference is special handling of kSplat v.s. kExtend. kExtend always loads 8 bytes, so the bounds check and tracing is different. Compared to LoadMem there is less need for pinning, since the result is always going to be in a SIMD/FP register, which is different from the index/addr register. The enum LoadTransformationKind was moved from function-body-decoder-impl.h to function-body-decoder.h so that no unncessary header file inclusions were needed to liftoff, and also it's a better place for it to live. Bug: v8:9909 Change-Id: I926bcc01c0c3c860223e8c08f91bc4ab3b75c399 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2203730 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#67914}
-
- 15 May, 2020 4 commits
-
-
Ng Zhi An authored
Only for arm and arm64 now. The ia32 and x64 ones are more complicated and will be included in subsequent changes. Bug: v8:9909 Change-Id: I6597efbccd780e12234f8674e09e60bb3f803630 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2202722 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#67840}
-
Ng Zhi An authored
Implement for x64, ia32, arm64, and arm. Bug: v8:9909 Change-Id: Ia9499b211e915f8763b4f593824099391dca7e1f Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2202718 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#67836}
-
Ng Zhi An authored
Implemented for x64, ia32, arm64, arm. Bug: v8:9909 Change-Id: Ib1479525d44c29b2ba02de31d655da2cde21d9fc Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2202356 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#67835}
-
Andreas Haas authored
This CL removes the default parameter of GetUnusedRegister to avoid bugs where the default parameter is used accidentially. With "{}" the default value of the parameter is easy to write, and also not much more difficult to read. R=clemensb@chromium.org Bug: v8:10506 Change-Id: I3debe5eb91578c82abdac81dc6c252435fdf30d6 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2202991Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#67822}
-
- 14 May, 2020 1 commit
-
-
Ng Zhi An authored
Implementation for x64 and ia32. Bug: v8:9909 Change-Id: Id494d292fe8ab464e07f4b9520d1c251d355615a Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2198456 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#67808}
-
- 13 May, 2020 2 commits
-
-
Andreas Haas authored
This CL fixes a bug in Liftoff where stack parameters for builtins were pushed in the reversed order. CC=bbudge@chromium.org R=clemensb@chromium.org Bug: v8:10281 Change-Id: I51ab4f19b0dc3835140ca3c05c98cc82dfe9cac4 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2196341Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#67779}
-
Zhou, Zhiguo authored
Bug: v8:9909 Change-Id: I1bd17d6a1a6f32e9076d80c91be2743868ecad2b Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2171475Reviewed-by: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Zhiguo Zhou <zhiguo.zhou@intel.com> Cr-Commit-Position: refs/heads/master@{#67763}
-
- 12 May, 2020 1 commit
-
-
Thibaud Michaud authored
R=clemensb@chromium.org,ahaas@chromium.org Bug: v8:10408 Change-Id: I436416e32d814b08543aa2dffbcf8464ec75923f Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2190423 Commit-Queue: Thibaud Michaud <thibaudm@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#67734}
-
- 06 May, 2020 1 commit
-
-
Andreas Haas authored
This CL implements all variants of CompareExchange on arm. Implementing 64-bit CompareExchange on arm requires a lot of registers, with the additional constraint that the low-word register of new_value and result have to have an even register code, and that the corresponding high-word registers have a register code that is by one higher than the register code of the low-word register. This register allocation is achieved by assigning fixed registers to all values. R=clemensb@chromium.org, v8-arm-ports@googlegroups.com Bug: v8:10108 Change-Id: I2edfde15e80db0d45621a461793018d88e997431 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2172791 Commit-Queue: Andreas Haas <ahaas@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#67592}
-
- 29 Apr, 2020 3 commits
-
-
Ng Zhi An authored
Tweak the register allocation logic in liftoff-compiler.cc. If we reuse src1 or src2 for dst, it complicates the logic in the codegen significantly. We will need to check which operand dst is equals to, back it up, then make sure the mask ends up in dst (since thats how vbsl and bsl works, the first operand holds the mask and is overwritten). By tweaking the allocation logic, no code gen is required for the other backends. Bug: v8:9909 Change-Id: I17843322508b18247c91e5959cf1b996b7f6a61d Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2171468 Commit-Queue: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#67481}
-
Andreas Haas authored
With this CL the registers in a register pair get ordered such that the low word register always has a lower register code than the high word register. This should allow easier reasoning about the register allocation, and prevent some register allocation bugs. Background: for many operations in Liftoff, input registers are reused as output registers. With register pairs, input register pairs are reused as output register pairs. Additional reasoning, and sometimes even additional code is needed when the registers of the output register pair are swapped, i.e. when the high word register of the input becomes the low word register of the output. With this CL the additional reasoning is not necessary anymore, as the high word and low word registers would get swapped during register allocation. Additionally this CL fixes the logic of the last_spilled_regs list. This list stored the last spilled registers, but recorded only one of the two registers of a register pair. With this CL, both registers get recorded. This CL does not have a regression test. The regression test was more than 9000 lines long, and quite slow. I was not able to minimize it substantially. The test would be fragile by nature, as it has to create a special register configuration or otherwise does not test anything meaningful. All in all I think it's better not to add the test. R=clemensb@chromium.org Bug: chromium:1074586 Change-Id: I4b2475b0c6537c7ce2e51fee281388cdd85f2953 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2168875Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Andreas Haas <ahaas@chromium.org> Cr-Commit-Position: refs/heads/master@{#67473}
-
jing.bao authored
Bug: v8:9909 Change-Id: Ic75c75fa3693a59bf059cf852172900ad95a1941 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2169026 Commit-Queue: Jing Bao <jing.bao@intel.com> Reviewed-by: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#67461}
-
- 28 Apr, 2020 1 commit
-
-
Kong, Fanchen authored
Bug: v8:9909 Change-Id: Ic6c26558c58630f0600ddf82e973d97f5414792b Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2166959Reviewed-by: Zhi An Ng <zhin@chromium.org> Commit-Queue: Fanchen Kong <fanchen.kong@intel.com> Cr-Commit-Position: refs/heads/master@{#67414}
-
- 27 Apr, 2020 1 commit
-
-
Zhou, Zhiguo authored
Bug: v8:9909 Change-Id: I066621f12ce594280f6f43bc526988e55729eefa Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2162366Reviewed-by: Zhi An Ng <zhin@chromium.org> Commit-Queue: Zhiguo Zhou <zhiguo.zhou@intel.com> Cr-Commit-Position: refs/heads/master@{#67411}
-
- 23 Apr, 2020 1 commit
-
-
Zhou, Zhiguo authored
Bug: v8:9909 Change-Id: Id0fcf8ff2575858dd3977795aa03df95b65b5720 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2158925Reviewed-by: Zhi An Ng <zhin@chromium.org> Reviewed-by: Clemens Backes <clemensb@chromium.org> Commit-Queue: Zhiguo Zhou <zhiguo.zhou@intel.com> Cr-Commit-Position: refs/heads/master@{#67348}
-
- 22 Apr, 2020 1 commit
-
-
Kong, Fanchen authored
Bug: v8:9909 Change-Id: Ib97bcc7afe516a014cd91128aa3c59f1b8b0b0af Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2151999 Commit-Queue: Fanchen Kong <fanchen.kong@intel.com> Reviewed-by: Clemens Backes <clemensb@chromium.org> Reviewed-by: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/master@{#67301}
-
- 21 Apr, 2020 1 commit
-
-
jing.bao authored
Bug: v8:9909 Change-Id: I11a07dcfe3362e8476ecf361f7de1c5047a34d7c Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2154330Reviewed-by: Zhi An Ng <zhin@chromium.org> Commit-Queue: Jing Bao <jing.bao@intel.com> Cr-Commit-Position: refs/heads/master@{#67258}
-