- 11 Dec, 2017 1 commit
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Michael Starzinger authored
R=clemensh@chromium.org Change-Id: Ib7e625763f0e017fe4490fb87c4e90e8d57489fd Reviewed-on: https://chromium-review.googlesource.com/817442Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#50001}
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- 02 Dec, 2017 1 commit
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Mathias Bynens authored
This patch normalizes the casing of hexadecimal digits in escape sequences of the form `\xNN` and integer literals of the form `0xNNNN`. Previously, the V8 code base used an inconsistent mixture of uppercase and lowercase. Google’s C++ style guide uses uppercase in its examples: https://google.github.io/styleguide/cppguide.html#Non-ASCII_Characters Moreover, uppercase letters more clearly stand out from the lowercase `x` (or `u`) characters at the start, as well as lowercase letters elsewhere in strings. BUG=v8:7109 TBR=marja@chromium.org,titzer@chromium.org,mtrofin@chromium.org,mstarzinger@chromium.org,rossberg@chromium.org,yangguo@chromium.org,mlippautz@chromium.org NOPRESUBMIT=true Cq-Include-Trybots: master.tryserver.blink:linux_trusty_blink_rel;master.tryserver.chromium.linux:linux_chromium_rel_ng Change-Id: I790e21c25d96ad5d95c8229724eb45d2aa9e22d6 Reviewed-on: https://chromium-review.googlesource.com/804294 Commit-Queue: Mathias Bynens <mathias@chromium.org> Reviewed-by: Jakob Kummerow <jkummerow@chromium.org> Cr-Commit-Position: refs/heads/master@{#49810}
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- 13 Oct, 2017 1 commit
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Mathias Bynens authored
New code should use nullptr instead of NULL. This patch updates existing use of NULL to nullptr where applicable, making the code base more consistent. BUG=v8:6928,v8:6921 Cq-Include-Trybots: master.tryserver.chromium.linux:linux_chromium_rel_ng;master.tryserver.v8:v8_linux_noi18n_rel_ng Change-Id: I4687f5b96fcfd88b41fa970a2b937b4f6538777c Reviewed-on: https://chromium-review.googlesource.com/718338 Commit-Queue: Mathias Bynens <mathias@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Ulan Degenbaev <ulan@chromium.org> Reviewed-by: Toon Verwaest <verwaest@chromium.org> Reviewed-by: Jakob Gruber <jgruber@chromium.org> Reviewed-by: Yang Guo <yangguo@chromium.org> Cr-Commit-Position: refs/heads/master@{#48557}
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- 29 Sep, 2017 1 commit
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Toon Verwaest authored
TBR: ofrobots@google.com, yangguo@chromium.org Bug: Change-Id: I6cb0704acabf9a7f2334de539a6600db8607baef Reviewed-on: https://chromium-review.googlesource.com/691720 Commit-Queue: Toon Verwaest <verwaest@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#48237}
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- 13 Sep, 2017 1 commit
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Michael Starzinger authored
R=clemensh@chromium.org Cq-Include-Trybots: master.tryserver.v8:v8_linux_noi18n_rel_ng Change-Id: I3df5d50f81909188ee0cb31d0f479aadeeabe20f Reviewed-on: https://chromium-review.googlesource.com/662780Reviewed-by: Jakob Gruber <jgruber@chromium.org> Reviewed-by: Igor Sheludko <ishell@chromium.org> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#47991}
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- 01 Sep, 2017 1 commit
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Michael Starzinger authored
R=jkummerow@chromium.org Change-Id: I8937933e9ec5b4bd150f5a044700716db458f365 Reviewed-on: https://chromium-review.googlesource.com/645691Reviewed-by: Jakob Kummerow <jkummerow@chromium.org> Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#47758}
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- 11 Aug, 2017 1 commit
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Ross McIlroy authored
Deletes the now unused Full-codegen compiler. Also removes some macro assembler instructions which are no longer used. Note: there is still additional cleanup work to do after this lands (e.g., remove support for FCG frames support and FCG debugger support, etc.), but this will be done in followup CLs to keep this patch managable. BUG=v8:6409 Change-Id: I8d828fe7a64d29f2c1252d5fda968a630a2e9ef2 Reviewed-on: https://chromium-review.googlesource.com/584773 Commit-Queue: Ross McIlroy <rmcilroy@chromium.org> Reviewed-by: Yang Guo <yangguo@chromium.org> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#47307}
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- 28 Jul, 2017 1 commit
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sreten.kovacevic authored
Add UseScratchRegisterScope for MIPS and use it instead of using at register directly. Original commit message: `Introduce a stripped down version of UseScratchRegisterScope for ARM and use it inside the assembler and macro-assembler. At the exception of the Call instructions, we now use this scope instead of using the ip register directly. This is inspired from how the ARM64 backend works. In general, the benefit of doing this is we can catch cases where ip is being used both by the caller and by the assembler. But more specifically, TurboFan reserves r9 as an extra scratch register because ip can already be used by the assembler. With this utility, we can isolate the cases in the code generator which need an extra register and potentially fix them, allowing us to give r9 back to the register allocator. This patch uncovered places in the assembler where we were using ip unconditionally when we could have re-used the destination register instead.` Bug: Change-Id: I1a35c1661579882801605337abfc95f75b47f052 Reviewed-on: https://chromium-review.googlesource.com/574923 Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com> Cr-Commit-Position: refs/heads/master@{#46963}
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- 31 May, 2017 1 commit
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neis authored
Instead of allocating and embedding certain heap numbers into the code during code assembly, emit dummies but record the allocation requests. Later then, in Assembler::GetCode, allocate the heap numbers and patch the code by replacing the dummies with the actual objects. The RelocInfos for the embedded objects are already recorded correctly when emitting the dummies. R=jarin@chromium.org BUG=v8:6048 Review-Url: https://codereview.chromium.org/2900683002 Cr-Commit-Position: refs/heads/master@{#45635}
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- 20 Apr, 2017 1 commit
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Ilija.Pavlovic authored
For MIPS64, many load/store operations from/to memory emit more then one instruction. This is the reason for moving them from assembler to macro-assembler. TEST= BUG= Review-Url: https://codereview.chromium.org/2829073002 Cr-Commit-Position: refs/heads/master@{#44746}
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- 07 Feb, 2017 1 commit
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franzih authored
Cleanup CHECK_EQ order and simplify CHECK_EQ(true/false). Cleanup callorder for negative numbers Cleanup callorder order for capital letter constants. Cleanup callorder for test.x checks. BUG= Review-Url: https://codereview.chromium.org/2677183002 Cr-Commit-Position: refs/heads/master@{#42997}
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- 08 Dec, 2016 1 commit
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Ilija.Pavlovic authored
Fix 7a6f294f. The first correction enables correct execution DoMathMinMax when two input registers are the same register. The second correction adds NOP instructions after branch instructions in tests macro_float_minmaxf(32|64). TEST=cctest/test-macro-assembler-mips[64]/macro_float_minmax_f32 cctest/test-macro-assembler-mips[64]/macro_float_minmax_f64 mjsunit/regress/math-min BUG= Review-Url: https://codereview.chromium.org/2556793003 Cr-Commit-Position: refs/heads/master@{#41596}
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- 07 Dec, 2016 1 commit
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dusan.simicic authored
This patch fixes jump_tables6 test for mips32r6 and mips64r6. This is regression from CL: https://crrev.com/d735f3ab12061f0a588b3f0538f9229cf747f818 BUG= Review-Url: https://codereview.chromium.org/2547033002 Cr-Commit-Position: refs/heads/master@{#41543}
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- 06 Dec, 2016 1 commit
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Ilija.Pavlovic authored
Port for 3396bb29 TEST= BUG= Review-Url: https://codereview.chromium.org/2534413002 Cr-Commit-Position: refs/heads/master@{#41508}
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- 01 Dec, 2016 2 commits
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Ilija.Pavlovic authored
Fix compilation failure in test-macro-assembler[64].cc caused by 8fcfe66f due to warning `lambda-expression in unevaluated context`. TEST=cctest/test-macro-assembler-mips[64] BUG= Review-Url: https://codereview.chromium.org/2543643005 Cr-Commit-Position: refs/heads/master@{#41433}
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dusan.simicic authored
Trampolines are generated when the value of pc_offset is greater than next_buffer_check_ (attribute from Assembler class). This value shouldn't be incremented in bind_to() method when internal reference label is bound, because it is not decremented when the switch table is generated (dd() method from Assemler class). This patch fixes this problem. Regression test are also included for mips and mips64 arch. BUG= Review-Url: https://codereview.chromium.org/2530143002 Cr-Commit-Position: refs/heads/master@{#41423}
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- 20 Oct, 2016 1 commit
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jkummerow authored
Review-Url: https://chromiumcodereview.appspot.com/2434753003 Cr-Commit-Position: refs/heads/master@{#40459}
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- 30 Sep, 2016 1 commit
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akos.palfi authored
Fixes the case when the 'imm' is in range [8000,ffff], as the specification says the 'imm' is sign-extended before the comparsion, so the effective range is [max_unsigned-7fff,max_unsigned]. TEST=mjsunit/generated-transition-stub@3b8ad45e BUG= Review-Url: https://codereview.chromium.org/2386673002 Cr-Commit-Position: refs/heads/master@{#39922}
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- 16 Aug, 2016 1 commit
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ivica.bogosavljevic authored
Port 77c9cb83. Original commit message: This commit fixes wasm little-endian load issue on big-endian platform by introducing reverse byte operation immediately after a load. BUG= Review-Url: https://codereview.chromium.org/2235703002 Cr-Commit-Position: refs/heads/master@{#38660}
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- 10 Aug, 2016 1 commit
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marija.antic authored
Implement Bovc and Bnvc instruction macros in macro assembler. The change 6f920d7d revealed an issue with AddBranchOvf for mips R6. All branching instructions other than BOVC and BNVC are handled by Branch macro, which assures correct handling of long and short branches. As a consequence, AddBranchOvf for R6 was working correctly only before trampoline was emitted, but the case of long branch was not handled at all. Implemented instruction macros enable proper handling of BOVC and BNVC in cases when long branching is needed. TEST=test/intl/general/case-mapping.js BUG= Review-Url: https://codereview.chromium.org/2225323002 Cr-Commit-Position: refs/heads/master@{#38513}
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- 27 Jun, 2016 1 commit
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ivica.bogosavljevic authored
BUG= Review-Url: https://codereview.chromium.org/2069933003 Cr-Commit-Position: refs/heads/master@{#37295}
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- 28 Apr, 2016 1 commit
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ivica.bogosavljevic authored
Implement unaligned access instructions, and tests for corresponding instruction BUG= Review-Url: https://codereview.chromium.org/1902743002 Cr-Commit-Position: refs/heads/master@{#35873}
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- 07 Apr, 2016 1 commit
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ivica.bogosavljevic authored
BUG= Review URL: https://codereview.chromium.org/1857193002 Cr-Commit-Position: refs/heads/master@{#35320}
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- 25 Mar, 2016 1 commit
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balazs.kilvady authored
Use macro instructions for min, max ops to get the same functionality on pre-r6 and r6 targets. BUG= TEST=mjsunit/math-min-max, cctest/test-macro-assembler-mips64/min_max_nan, cctest/test-macro-assembler-mips/min_max_nan, cctest/test-assembler-mips64/min_max, cctest/test-assembler-mips/min_max Review URL: https://codereview.chromium.org/1694833002 Cr-Commit-Position: refs/heads/master@{#35073}
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- 18 Mar, 2016 1 commit
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Ilija.Pavlovic authored
The higher word (bits 32 - 63) of FPU register is set on zero before storing result. TEST=cctest/test-macro-assembler-mips64/Cvt_s_uw_Trunc_uw_s BUG= Review URL: https://codereview.chromium.org/1812193003 Cr-Commit-Position: refs/heads/master@{#34889}
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- 10 Mar, 2016 1 commit
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balazs.kilvady authored
Make the low level assembler implementation exact and protected to disallow explicit usage. BUG= Review URL: https://codereview.chromium.org/1749263002 Cr-Commit-Position: refs/heads/master@{#34673}
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- 09 Mar, 2016 1 commit
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Ilija.Pavlovic authored
Implementation new test cases for conversion instructions Cvt_s_uw, Cvt_s_ul, Cvt_d_ul and truncate instructions Trunc_uw_s, Trunc_ul_s, Trunc_ul_d, Trunc_l_d, Trunc_l_ud, Trunc_w_d. TEST=cctest/test-macro-assembler-mips/cvt_s_w_Trunc_uw_s, others cctest/test-macro-assembler-mips64/Cvt_s_uw_Trunc_uw_s, others BUG= Review URL: https://codereview.chromium.org/1747863002 Cr-Commit-Position: refs/heads/master@{#34618}
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- 03 Feb, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1628453002 Cr-Commit-Position: refs/heads/master@{#33703}
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- 13 Jan, 2016 1 commit
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balazs.kilvady authored
Port 5091e8f2 TEST=cctest/test-assembler-mips64/jump_tables1,cctest/test-assembler-mips64/jump_tables2,cctest/test-assembler-mips64/jump_tables3,cctest/test-macro-assembler-mips/jump_tables5 BUG= Review URL: https://codereview.chromium.org/1582533005 Cr-Commit-Position: refs/heads/master@{#33266}
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- 12 Jan, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1573953002 Cr-Commit-Position: refs/heads/master@{#33249}
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- 06 Jan, 2016 1 commit
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ivica.bogosavljevic authored
Several ports to enable r6 compact branch optimizations on MIPS64 Port 3573d3cb Original commit message: MIPS: r6 compact branch optimization. Port bddf8c9e Original commit message: MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort() Port 6993cd0d Original commit message: MIPS: Fix 'MIPS:r6 compact branch optimization.' Jic and jialc compact branch ops are fixed as they does not have 'forbidden slot' restriction. Also COP1 branches (CTI instructions) added to IsForbiddenAfterBranchInstr(). Port bb332195 Original commit message: MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort() Port c91bcf71 Original commit message: MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort() for r6. BUG= Review URL: https://codereview.chromium.org/1534183002 Cr-Commit-Position: refs/heads/master@{#33136}
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- 05 Jan, 2016 1 commit
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balazs.kilvady authored
BUG= Review URL: https://codereview.chromium.org/1545013002 Cr-Commit-Position: refs/heads/master@{#33127}
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- 09 Dec, 2015 1 commit
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jochen authored
Embedders still can use those APIs by default test-api.cc still has an exception to use the old APIs... BUG=v8:4143 R=vogelheim@chromium.org LOG=n Review URL: https://codereview.chromium.org/1505803004 Cr-Commit-Position: refs/heads/master@{#32701}
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- 25 Nov, 2015 1 commit
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jochen authored
We always want to have an Isolate, so just use an extra ctor arg BUG=2487 R=yangguo@chromium.org,mstarzinger@chromium.org LOG=n Review URL: https://codereview.chromium.org/1476763002 Cr-Commit-Position: refs/heads/master@{#32277}
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- 23 Nov, 2015 2 commits
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jochen authored
BUG=2487 R=yangguo@chromium.org LOG=n Review URL: https://codereview.chromium.org/1466323002 Cr-Commit-Position: refs/heads/master@{#32178}
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jochen authored
BUG=2487 R=ulan@chromium.org LOG=n Review URL: https://codereview.chromium.org/1457223005 Cr-Commit-Position: refs/heads/master@{#32164}
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- 16 Nov, 2015 1 commit
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jochen authored
BUG=4134 R=epertoso@chromium.org LOG=n Review URL: https://codereview.chromium.org/1451733002 Cr-Commit-Position: refs/heads/master@{#32011}
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- 13 Jul, 2015 1 commit
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balazs.kilvady authored
Port f0d1106a Fixes possible failure in AssembleArchTableSwitch(). BUG=v8:4294 LOG=y Review URL: https://codereview.chromium.org/1235883004 Cr-Commit-Position: refs/heads/master@{#29621}
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- 09 Jul, 2014 1 commit
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dusan.milosavljevic@rt-rk.com authored
Summary: - Changes in common code are mainly boilerplate changes, gyp and test status files updates. - On mips64 simulator all tests pass from all test units. - Current issues: mjsunit JS debugger tests fail randomly on HW in release mode. Corresponding tests are skipped on HW. - Skipped tests on mips64: test-heap/ReleaseOverReservedPages, mjsunit/debug-* TEST= BUG= R=danno@chromium.org, plind44@gmail.com, ulan@chromium.org Review URL: https://codereview.chromium.org/371923006 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22297 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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- 30 Jun, 2014 1 commit
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jochen@chromium.org authored
Also split v8-core independent methods from checks.h to base/logging.h and merge v8checks with the rest of checks. The CPU::FlushICache method is moved to CpuFeatures::FlushICache RoundUp and related methods are moved to base/macros.h Remove all layering violations from src/libplatform BUG=none R=jkummerow@chromium.org LOG=n Review URL: https://codereview.chromium.org/358363002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22092 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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