PPC [simd]: Implement vector I64x2 GtS, GeS and Abs.

Change-Id: I2fe3b9431fbb22ee045090ba199bfa3b6fd5e19d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2785424Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#73648}

src/compiler/backend/ppc/code-generator-ppc.cc

@@ -2923,6 +2923,18 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vadduwm(i.OutputSimd128Register(), kScratchSimd128Reg, tempFPReg1);
       break;
     }
+    case kPPC_I64x2Abs: {
+      Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0));
+      Simd128Register src = i.InputSimd128Register(0);
+      constexpr int shift_bits = 63;
+      __ li(ip, Operand(shift_bits));
+      __ mtvsrd(kScratchSimd128Reg, ip);
+      __ vspltb(kScratchSimd128Reg, kScratchSimd128Reg, Operand(7));
+      __ vsrad(kScratchSimd128Reg, src, kScratchSimd128Reg);
+      __ vxor(tempFPReg1, src, kScratchSimd128Reg);
+      __ vsubudm(i.OutputSimd128Register(), tempFPReg1, kScratchSimd128Reg);
+      break;
+    }
     case kPPC_I32x4Abs: {
       Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0));
       Simd128Register src = i.InputSimd128Register(0);

src/compiler/backend/ppc/instruction-codes-ppc.h

@@ -277,6 +277,7 @@ namespace compiler {
   V(PPC_I64x2ExtMulHighI32x4S)       \
   V(PPC_I64x2ExtMulLowI32x4U)        \
   V(PPC_I64x2ExtMulHighI32x4U)       \
+  V(PPC_I64x2Abs)                    \
   V(PPC_I32x4Splat)                  \
   V(PPC_I32x4ExtractLane)            \
   V(PPC_I32x4ReplaceLane)            \

src/compiler/backend/ppc/instruction-scheduler-ppc.cc

@@ -200,6 +200,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kPPC_I64x2ExtMulHighI32x4S:
     case kPPC_I64x2ExtMulLowI32x4U:
     case kPPC_I64x2ExtMulHighI32x4U:
+    case kPPC_I64x2Abs:
     case kPPC_I32x4Splat:
     case kPPC_I32x4ExtractLane:
     case kPPC_I32x4ReplaceLane:

src/compiler/backend/ppc/instruction-selector-ppc.cc

@@ -2181,6 +2181,8 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
   V(I64x2ExtMulHighI32x4S) \
   V(I64x2ExtMulLowI32x4U)  \
   V(I64x2ExtMulHighI32x4U) \
+  V(I64x2GtS)              \
+  V(I64x2GeS)              \
   V(I32x4Add)              \
   V(I32x4Sub)              \
   V(I32x4Mul)              \
@@ -2272,6 +2274,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
   V(F32x4Trunc)                \
   V(F32x4NearestInt)           \
   V(F32x4DemoteF64x2Zero)      \
+  V(I64x2Abs)                  \
   V(I64x2Neg)                  \
   V(I64x2SConvertI32x4Low)     \
   V(I64x2SConvertI32x4High)    \
@@ -2490,10 +2493,6 @@ void InstructionSelector::VisitS128Const(Node* node) {
   }
 }
 
-void InstructionSelector::VisitI64x2GtS(Node* node) { UNIMPLEMENTED(); }
-void InstructionSelector::VisitI64x2GeS(Node* node) { UNIMPLEMENTED(); }
-void InstructionSelector::VisitI64x2Abs(Node* node) { UNIMPLEMENTED(); }
-
 void InstructionSelector::EmitPrepareResults(
     ZoneVector<PushParameter>* results, const CallDescriptor* call_descriptor,
     Node* node) {