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Commit da7c5a73 authored by zhengxing.li's avatar zhengxing.li Committed by Commit bot
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X87: [turbofan] Make MachineType a pair of enums. 

  port bb2a830d (r32738)

  original commit message:
  MachineType is now a class with two enum fields:
  - MachineRepresentation
  - MachineSemantic

  Both enums are usable on their own, and this change switches some places from using MachineType to use just MachineRepresentation. Most notably:
  - register allocator now uses just the representation.
  - Phi and Select nodes only refer to representations.

BUG=

Review URL: https://codereview.chromium.org/1520793002

Cr-Commit-Position: refs/heads/master@{#32778}
parent ed698f3d
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Showing with 62 additions and 61 deletions
src/compiler/x87/code-generator-x87.cc
View file @ da7c5a73
......@@ -1264,22 +1264,22 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
case kX87Push:
if (instr->InputAt(0)->IsDoubleRegister()) {
auto allocated = AllocatedOperand::cast(*instr->InputAt(0));
if (allocated.machine_type() == kRepFloat32) {
if (allocated.representation() == MachineRepresentation::kFloat32) {
__ sub(esp, Immediate(kDoubleSize));
__ fst_s(Operand(esp, 0));
} else {
DCHECK(allocated.machine_type() == kRepFloat64);
DCHECK(allocated.representation() == MachineRepresentation::kFloat64);
__ sub(esp, Immediate(kDoubleSize));
__ fst_d(Operand(esp, 0));
}
} else if (instr->InputAt(0)->IsDoubleStackSlot()) {
auto allocated = AllocatedOperand::cast(*instr->InputAt(0));
if (allocated.machine_type() == kRepFloat32) {
if (allocated.representation() == MachineRepresentation::kFloat32) {
__ sub(esp, Immediate(kDoubleSize));
__ fld_s(i.InputOperand(0));
__ fstp_s(MemOperand(esp, 0));
} else {
DCHECK(allocated.machine_type() == kRepFloat64);
DCHECK(allocated.representation() == MachineRepresentation::kFloat64);
__ sub(esp, Immediate(kDoubleSize));
__ fld_d(i.InputOperand(0));
__ fstp_d(MemOperand(esp, 0));
......@@ -1868,11 +1868,11 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
DCHECK(destination->IsDoubleStackSlot());
Operand dst = g.ToOperand(destination);
auto allocated = AllocatedOperand::cast(*source);
switch (allocated.machine_type()) {
case kRepFloat32:
switch (allocated.representation()) {
case MachineRepresentation::kFloat32:
__ fst_s(dst);
break;
case kRepFloat64:
case MachineRepresentation::kFloat64:
__ fst_d(dst);
break;
default:
......@@ -1885,11 +1885,11 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
if (destination->IsDoubleRegister()) {
// always only push one value into the x87 stack.
__ fstp(0);
switch (allocated.machine_type()) {
case kRepFloat32:
switch (allocated.representation()) {
case MachineRepresentation::kFloat32:
__ fld_s(src);
break;
case kRepFloat64:
case MachineRepresentation::kFloat64:
__ fld_d(src);
break;
default:
......@@ -1897,12 +1897,12 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
}
} else {
Operand dst = g.ToOperand(destination);
switch (allocated.machine_type()) {
case kRepFloat32:
switch (allocated.representation()) {
case MachineRepresentation::kFloat32:
__ fld_s(src);
__ fstp_s(dst);
break;
case kRepFloat64:
case MachineRepresentation::kFloat64:
__ fld_d(src);
__ fstp_d(dst);
break;
......@@ -1945,13 +1945,13 @@ void CodeGenerator::AssembleSwap(InstructionOperand* source,
UNREACHABLE();
} else if (source->IsDoubleRegister() && destination->IsDoubleStackSlot()) {
auto allocated = AllocatedOperand::cast(*source);
switch (allocated.machine_type()) {
case kRepFloat32:
switch (allocated.representation()) {
case MachineRepresentation::kFloat32:
__ fld_s(g.ToOperand(destination));
__ fxch();
__ fstp_s(g.ToOperand(destination));
break;
case kRepFloat64:
case MachineRepresentation::kFloat64:
__ fld_d(g.ToOperand(destination));
__ fxch();
__ fstp_d(g.ToOperand(destination));
......@@ -1961,14 +1961,14 @@ void CodeGenerator::AssembleSwap(InstructionOperand* source,
}
} else if (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot()) {
auto allocated = AllocatedOperand::cast(*source);
switch (allocated.machine_type()) {
case kRepFloat32:
switch (allocated.representation()) {
case MachineRepresentation::kFloat32:
__ fld_s(g.ToOperand(source));
__ fld_s(g.ToOperand(destination));
__ fstp_s(g.ToOperand(source));
__ fstp_s(g.ToOperand(destination));
break;
case kRepFloat64:
case MachineRepresentation::kFloat64:
__ fld_d(g.ToOperand(source));
__ fld_d(g.ToOperand(destination));
__ fstp_d(g.ToOperand(source));
......
src/compiler/x87/instruction-selector-x87.cc
View file @ da7c5a73
......@@ -130,26 +130,25 @@ class X87OperandGenerator final : public OperandGenerator {
void InstructionSelector::VisitLoad(Node* node) {
MachineType rep = RepresentationOf(OpParameter<LoadRepresentation>(node));
MachineType typ = TypeOf(OpParameter<LoadRepresentation>(node));
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
ArchOpcode opcode;
switch (rep) {
case kRepFloat32:
switch (load_rep.representation()) {
case MachineRepresentation::kFloat32:
opcode = kX87Movss;
break;
case kRepFloat64:
case MachineRepresentation::kFloat64:
opcode = kX87Movsd;
break;
case kRepBit: // Fall through.
case kRepWord8:
opcode = typ == kTypeInt32 ? kX87Movsxbl : kX87Movzxbl;
case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kWord8:
opcode = load_rep.IsSigned() ? kX87Movsxbl : kX87Movzxbl;
break;
case kRepWord16:
opcode = typ == kTypeInt32 ? kX87Movsxwl : kX87Movzxwl;
case MachineRepresentation::kWord16:
opcode = load_rep.IsSigned() ? kX87Movsxwl : kX87Movzxwl;
break;
case kRepTagged: // Fall through.
case kRepWord32:
case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kWord32:
opcode = kX87Movl;
break;
default:
......@@ -177,10 +176,10 @@ void InstructionSelector::VisitStore(Node* node) {
StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
WriteBarrierKind write_barrier_kind = store_rep.write_barrier_kind();
MachineType rep = RepresentationOf(store_rep.machine_type());
MachineRepresentation rep = store_rep.machine_type().representation();
if (write_barrier_kind != kNoWriteBarrier) {
DCHECK_EQ(kRepTagged, rep);
DCHECK_EQ(MachineRepresentation::kTagged, rep);
AddressingMode addressing_mode;
InstructionOperand inputs[3];
size_t input_count = 0;
......@@ -219,21 +218,21 @@ void InstructionSelector::VisitStore(Node* node) {
} else {
ArchOpcode opcode;
switch (rep) {
case kRepFloat32:
case MachineRepresentation::kFloat32:
opcode = kX87Movss;
break;
case kRepFloat64:
case MachineRepresentation::kFloat64:
opcode = kX87Movsd;
break;
case kRepBit: // Fall through.
case kRepWord8:
case MachineRepresentation::kBit: // Fall through.
case MachineRepresentation::kWord8:
opcode = kX87Movb;
break;
case kRepWord16:
case MachineRepresentation::kWord16:
opcode = kX87Movw;
break;
case kRepTagged: // Fall through.
case kRepWord32:
case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kWord32:
opcode = kX87Movl;
break;
default:
......@@ -244,7 +243,8 @@ void InstructionSelector::VisitStore(Node* node) {
InstructionOperand val;
if (g.CanBeImmediate(value)) {
val = g.UseImmediate(value);
} else if (rep == kRepWord8 || rep == kRepBit) {
} else if (rep == MachineRepresentation::kWord8 ||
rep == MachineRepresentation::kBit) {
val = g.UseByteRegister(value);
} else {
val = g.UseRegister(value);
......@@ -263,27 +263,26 @@ void InstructionSelector::VisitStore(Node* node) {
void InstructionSelector::VisitCheckedLoad(Node* node) {
MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
MachineType typ = TypeOf(OpParameter<MachineType>(node));
CheckedLoadRepresentation load_rep = CheckedLoadRepresentationOf(node->op());
X87OperandGenerator g(this);
Node* const buffer = node->InputAt(0);
Node* const offset = node->InputAt(1);
Node* const length = node->InputAt(2);
ArchOpcode opcode;
switch (rep) {
case kRepWord8:
opcode = typ == kTypeInt32 ? kCheckedLoadInt8 : kCheckedLoadUint8;
switch (load_rep.representation()) {
case MachineRepresentation::kWord8:
opcode = load_rep.IsSigned() ? kCheckedLoadInt8 : kCheckedLoadUint8;
break;
case kRepWord16:
opcode = typ == kTypeInt32 ? kCheckedLoadInt16 : kCheckedLoadUint16;
case MachineRepresentation::kWord16:
opcode = load_rep.IsSigned() ? kCheckedLoadInt16 : kCheckedLoadUint16;
break;
case kRepWord32:
case MachineRepresentation::kWord32:
opcode = kCheckedLoadWord32;
break;
case kRepFloat32:
case MachineRepresentation::kFloat32:
opcode = kCheckedLoadFloat32;
break;
case kRepFloat64:
case MachineRepresentation::kFloat64:
opcode = kCheckedLoadFloat64;
break;
default:
......@@ -306,7 +305,8 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
void InstructionSelector::VisitCheckedStore(Node* node) {
MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
MachineRepresentation rep =
CheckedStoreRepresentationOf(node->op()).representation();
X87OperandGenerator g(this);
Node* const buffer = node->InputAt(0);
Node* const offset = node->InputAt(1);
......@@ -314,19 +314,19 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
Node* const value = node->InputAt(3);
ArchOpcode opcode;
switch (rep) {
case kRepWord8:
case MachineRepresentation::kWord8:
opcode = kCheckedStoreWord8;
break;
case kRepWord16:
case MachineRepresentation::kWord16:
opcode = kCheckedStoreWord16;
break;
case kRepWord32:
case MachineRepresentation::kWord32:
opcode = kCheckedStoreWord32;
break;
case kRepFloat32:
case MachineRepresentation::kFloat32:
opcode = kCheckedStoreFloat32;
break;
case kRepFloat64:
case MachineRepresentation::kFloat64:
opcode = kCheckedStoreFloat64;
break;
default:
......@@ -334,10 +334,11 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
return;
}
InstructionOperand value_operand =
g.CanBeImmediate(value)
? g.UseImmediate(value)
: ((rep == kRepWord8 || rep == kRepBit) ? g.UseByteRegister(value)
: g.UseRegister(value));
g.CanBeImmediate(value) ? g.UseImmediate(value)
: ((rep == MachineRepresentation::kWord8 ||
rep == MachineRepresentation::kBit)
? g.UseByteRegister(value)
: g.UseRegister(value));
InstructionOperand offset_operand = g.UseRegister(offset);
InstructionOperand length_operand =
g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length);
......
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