Commit d30070d3 authored by balazs.kilvady's avatar balazs.kilvady Committed by Commit bot

Fix 'Fix [turbofan] Prevent storing signalling NaNs into holey double arrays.'

Port 52f2ceb0

Original commit message:
On MIPS different signaling NaN values must be used for hardware and simulator targets, even at snapshot generation when always simulator is used.

This introduces SilenceNaN operator, which makes sure that we only
store quiet NaNs into holey arrays. We omit the NaN silencing code
at instruction selection time if the input is an operation that
cannot possibly produce signalling NaNs.

BUG=
TEST=mjsunit/compiler/regress-store-holey-double-array

Review-Url: https://codereview.chromium.org/2188433002
Cr-Commit-Position: refs/heads/master@{#38090}
parent 3dedc3e5
...@@ -357,28 +357,47 @@ ...@@ -357,28 +357,47 @@
], ],
'cflags': ['-march=i586'], 'cflags': ['-march=i586'],
}], # v8_target_arch=="x87" }], # v8_target_arch=="x87"
['(v8_target_arch=="mips" or v8_target_arch=="mipsel" \ ['v8_target_arch=="mips" or v8_target_arch=="mipsel" \
or v8_target_arch=="mips64" or v8_target_arch=="mips64el") \ or v8_target_arch=="mips64" or v8_target_arch=="mips64el"', {
and v8_target_arch==target_arch', {
'target_conditions': [ 'target_conditions': [
['_toolset=="target"', { ['_toolset=="target"', {
# Target built with a Mips CXX compiler.
'variables': {
'ldso_path%': '<!(/bin/echo -n $LDSO_PATH)',
'ld_r_path%': '<!(/bin/echo -n $LD_R_PATH)',
},
'conditions': [ 'conditions': [
['ldso_path!=""', { ['v8_target_arch==target_arch', {
'ldflags': ['-Wl,--dynamic-linker=<(ldso_path)'], # Target built with a Mips CXX compiler.
}], 'variables': {
['ld_r_path!=""', { 'ldso_path%': '<!(/bin/echo -n $LDSO_PATH)',
'ldflags': ['-Wl,--rpath=<(ld_r_path)'], 'ld_r_path%': '<!(/bin/echo -n $LD_R_PATH)',
},
'conditions': [
['ldso_path!=""', {
'ldflags': ['-Wl,--dynamic-linker=<(ldso_path)'],
}],
['ld_r_path!=""', {
'ldflags': ['-Wl,--rpath=<(ld_r_path)'],
}],
[ 'clang==1', {
'cflags': ['-integrated-as'],
}],
['OS!="mac"', {
'defines': ['_MIPS_TARGET_HW',],
}, {
'defines': ['_MIPS_TARGET_SIMULATOR',],
}],
],
}, {
'defines': ['_MIPS_TARGET_SIMULATOR',],
}], }],
[ 'clang==1', { ],
'cflags': ['-integrated-as'], }], #'_toolset=="target"
['_toolset=="host"', {
'conditions': [
['v8_target_arch==target_arch and OS!="mac"', {
'defines': ['_MIPS_TARGET_HW',],
}, {
'defines': ['_MIPS_TARGET_SIMULATOR',],
}], }],
], ],
}], }], #'_toolset=="host"
], ],
}], }],
['v8_target_arch=="mips"', { ['v8_target_arch=="mips"', {
......
...@@ -1335,19 +1335,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -1335,19 +1335,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kMipsFloat64InsertHighWord32: case kMipsFloat64InsertHighWord32:
__ FmoveHigh(i.OutputDoubleRegister(), i.InputRegister(1)); __ FmoveHigh(i.OutputDoubleRegister(), i.InputRegister(1));
break; break;
case kMipsFloat64SilenceNaN: { case kMipsFloat64SilenceNaN:
FPURegister value = i.InputDoubleRegister(0); __ FPUCanonicalizeNaN(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
FPURegister result = i.OutputDoubleRegister();
Register scratch0 = i.TempRegister(0);
Label is_nan, not_nan;
__ BranchF(NULL, &is_nan, eq, value, value);
__ Branch(&not_nan);
__ bind(&is_nan);
__ LoadRoot(scratch0, Heap::kNanValueRootIndex);
__ ldc1(result, FieldMemOperand(scratch0, HeapNumber::kValueOffset));
__ bind(&not_nan);
break; break;
}
// ... more basic instructions ... // ... more basic instructions ...
......
...@@ -843,8 +843,10 @@ enum ScopeType { ...@@ -843,8 +843,10 @@ enum ScopeType {
// Use mips sNaN which is a not used qNaN in x87 port as sNaN to workaround this // Use mips sNaN which is a not used qNaN in x87 port as sNaN to workaround this
// issue // issue
// for some test cases. // for some test cases.
#if (V8_TARGET_ARCH_MIPS && !defined(_MIPS_ARCH_MIPS32R6)) || \ #if (V8_TARGET_ARCH_MIPS && !defined(_MIPS_ARCH_MIPS32R6) && \
(V8_TARGET_ARCH_MIPS64 && !defined(_MIPS_ARCH_MIPS64R6)) || \ (!defined(USE_SIMULATOR) || !defined(_MIPS_TARGET_SIMULATOR))) || \
(V8_TARGET_ARCH_MIPS64 && !defined(_MIPS_ARCH_MIPS64R6) && \
(!defined(USE_SIMULATOR) || !defined(_MIPS_TARGET_SIMULATOR))) || \
(V8_TARGET_ARCH_X87) (V8_TARGET_ARCH_X87)
const uint32_t kHoleNanUpper32 = 0xFFFF7FFF; const uint32_t kHoleNanUpper32 = 0xFFFF7FFF;
const uint32_t kHoleNanLower32 = 0xFFFF7FFF; const uint32_t kHoleNanLower32 = 0xFFFF7FFF;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment