Commit cfd32bee authored by Milad Farazmand's avatar Milad Farazmand Committed by Commit Bot

s390: [wasm-simd] Implement Simd128 Load and Store

Change-Id: I01a449f098c7be3f1e071f57542dac6b67fb366d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1944279Reviewed-by: 's avatarJunliang Yan <jyan@ca.ibm.com>
Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#65294}
parent 647a0719
...@@ -2578,6 +2578,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -2578,6 +2578,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kS390_LoadDouble: case kS390_LoadDouble:
ASSEMBLE_LOAD_FLOAT(LoadDouble); ASSEMBLE_LOAD_FLOAT(LoadDouble);
break; break;
case kS390_LoadSimd128: {
AddressingMode mode = kMode_None;
MemOperand operand = i.MemoryOperand(&mode);
__ vl(i.OutputSimd128Register(), operand, Condition(0));
EmitWordLoadPoisoningIfNeeded(this, instr, i);
break;
}
case kS390_StoreWord8: case kS390_StoreWord8:
ASSEMBLE_STORE_INTEGER(StoreByte); ASSEMBLE_STORE_INTEGER(StoreByte);
break; break;
...@@ -2624,6 +2631,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -2624,6 +2631,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kS390_StoreDouble: case kS390_StoreDouble:
ASSEMBLE_STORE_DOUBLE(); ASSEMBLE_STORE_DOUBLE();
break; break;
case kS390_StoreSimd128: {
size_t index = 0;
AddressingMode mode = kMode_None;
MemOperand operand = i.MemoryOperand(&mode, &index);
__ vst(i.InputSimd128Register(index), operand, Condition(0));
break;
}
case kS390_Lay: case kS390_Lay:
__ lay(i.OutputRegister(), i.MemoryOperand()); __ lay(i.OutputRegister(), i.MemoryOperand());
break; break;
......
...@@ -196,7 +196,9 @@ namespace compiler { ...@@ -196,7 +196,9 @@ namespace compiler {
V(S390_Word64AtomicXorUint8) \ V(S390_Word64AtomicXorUint8) \
V(S390_Word64AtomicXorUint16) \ V(S390_Word64AtomicXorUint16) \
V(S390_Word64AtomicXorUint32) \ V(S390_Word64AtomicXorUint32) \
V(S390_Word64AtomicXorUint64) V(S390_Word64AtomicXorUint64) \
V(S390_StoreSimd128) \
V(S390_LoadSimd128)
// Addressing modes represent the "shape" of inputs to an instruction. // Addressing modes represent the "shape" of inputs to an instruction.
// Many instructions support multiple addressing modes. Addressing modes // Many instructions support multiple addressing modes. Addressing modes
......
...@@ -154,6 +154,7 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -154,6 +154,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_LoadWord64: case kS390_LoadWord64:
case kS390_LoadFloat32: case kS390_LoadFloat32:
case kS390_LoadDouble: case kS390_LoadDouble:
case kS390_LoadSimd128:
case kS390_LoadReverse16: case kS390_LoadReverse16:
case kS390_LoadReverse32: case kS390_LoadReverse32:
case kS390_LoadReverse64: case kS390_LoadReverse64:
...@@ -170,6 +171,7 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -170,6 +171,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_StoreReverse64: case kS390_StoreReverse64:
case kS390_StoreFloat32: case kS390_StoreFloat32:
case kS390_StoreDouble: case kS390_StoreDouble:
case kS390_StoreSimd128:
case kS390_Push: case kS390_Push:
case kS390_PushFrame: case kS390_PushFrame:
case kS390_StoreToStackSlot: case kS390_StoreToStackSlot:
......
...@@ -293,6 +293,9 @@ ArchOpcode SelectLoadOpcode(Node* node) { ...@@ -293,6 +293,9 @@ ArchOpcode SelectLoadOpcode(Node* node) {
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:
opcode = kS390_LoadWordU32; opcode = kS390_LoadWordU32;
break; break;
case MachineRepresentation::kSimd128:
opcode = kS390_LoadSimd128;
break;
#if V8_TARGET_ARCH_S390X #if V8_TARGET_ARCH_S390X
case MachineRepresentation::kTaggedSigned: // Fall through. case MachineRepresentation::kTaggedSigned: // Fall through.
case MachineRepresentation::kTaggedPointer: // Fall through. case MachineRepresentation::kTaggedPointer: // Fall through.
...@@ -305,7 +308,6 @@ ArchOpcode SelectLoadOpcode(Node* node) { ...@@ -305,7 +308,6 @@ ArchOpcode SelectLoadOpcode(Node* node) {
#endif #endif
case MachineRepresentation::kCompressedPointer: // Fall through. case MachineRepresentation::kCompressedPointer: // Fall through.
case MachineRepresentation::kCompressed: // Fall through. case MachineRepresentation::kCompressed: // Fall through.
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
default: default:
UNREACHABLE(); UNREACHABLE();
...@@ -766,6 +768,13 @@ static void VisitGeneralStore( ...@@ -766,6 +768,13 @@ static void VisitGeneralStore(
value = value->InputAt(0); value = value->InputAt(0);
} }
break; break;
case MachineRepresentation::kSimd128:
opcode = kS390_StoreSimd128;
if (m.IsSimd128ReverseBytes()) {
opcode = kS390_StoreReverseSimd128;
value = value->InputAt(0);
}
break;
#if V8_TARGET_ARCH_S390X #if V8_TARGET_ARCH_S390X
case MachineRepresentation::kTaggedSigned: // Fall through. case MachineRepresentation::kTaggedSigned: // Fall through.
case MachineRepresentation::kTaggedPointer: // Fall through. case MachineRepresentation::kTaggedPointer: // Fall through.
...@@ -782,7 +791,6 @@ static void VisitGeneralStore( ...@@ -782,7 +791,6 @@ static void VisitGeneralStore(
#else #else
case MachineRepresentation::kWord64: // Fall through. case MachineRepresentation::kWord64: // Fall through.
#endif #endif
case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone: case MachineRepresentation::kNone:
UNREACHABLE(); UNREACHABLE();
return; return;
......
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