Commit cb4faa90 authored by Thibaud Michaud's avatar Thibaud Michaud Committed by Commit Bot

Reland "[liftoff][arm64] Use 64 bit offset reg in mem op"

This is a reland of f645d0b8

The issue was that converting an i64 to an i32 didn't clear the upper
bits on arm64. This was not necessary before because we did the zero
extension as part of the load operand, but this is required now that
we use the full register.

Original change's description:
> [liftoff][arm64] Use 64 bit offset reg in mem op
>
> Accessing the Wasm memory with a 64 bit offset was truncated to 32 bit,
> which is fine if we check bounds first, but not if we rely on the
> trap handler to catch the OOB.
>
> R=clemensb@chromium.org
>
> Bug: v8:11587
> Change-Id: I82a3a2906e55d9d640c30e770a5c93532e3a442c
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2808942
> Reviewed-by: Clemens Backes <clemensb@chromium.org>
> Commit-Queue: Thibaud Michaud <thibaudm@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#73829}

Bug: v8:11587
Change-Id: Ibc182475745c6f697a0ba6d75c260b74ddf8fe52
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2810846Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Commit-Queue: Thibaud Michaud <thibaudm@chromium.org>
Cr-Commit-Position: refs/heads/master@{#73853}
parent a19f41db
...@@ -128,7 +128,7 @@ inline MemOperand GetMemOp(LiftoffAssembler* assm, ...@@ -128,7 +128,7 @@ inline MemOperand GetMemOp(LiftoffAssembler* assm,
UseScratchRegisterScope* temps, Register addr, UseScratchRegisterScope* temps, Register addr,
Register offset, T offset_imm) { Register offset, T offset_imm) {
if (offset.is_valid()) { if (offset.is_valid()) {
if (offset_imm == 0) return MemOperand(addr.X(), offset.W(), UXTW); if (offset_imm == 0) return MemOperand(addr.X(), offset.X());
Register tmp = temps->AcquireX(); Register tmp = temps->AcquireX();
DCHECK_GE(kMaxUInt32, offset_imm); DCHECK_GE(kMaxUInt32, offset_imm);
assm->Add(tmp, offset.X(), offset_imm); assm->Add(tmp, offset.X(), offset_imm);
...@@ -1333,7 +1333,7 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode, ...@@ -1333,7 +1333,7 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
LiftoffRegister src, Label* trap) { LiftoffRegister src, Label* trap) {
switch (opcode) { switch (opcode) {
case kExprI32ConvertI64: case kExprI32ConvertI64:
if (src != dst) Mov(dst.gp().W(), src.gp().W()); Mov(dst.gp().W(), src.gp().W());
return true; return true;
case kExprI32SConvertF32: case kExprI32SConvertF32:
Fcvtzs(dst.gp().W(), src.fp().S()); // f32 -> i32 round to zero. Fcvtzs(dst.gp().W(), src.fp().S()); // f32 -> i32 round to zero.
......
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