Commit bfd51f29 authored by yangguo@chromium.org's avatar yangguo@chromium.org

R=yangguo@chromium.org,svenpanne@chromium.org

x64 BinaryOpStub::GenerateSmiCode use wrong registers in one code path.

e.g. d8 --trace_ic
var dd = new Float64Array(2);
dd[1] = 1;
(function fn() {
  for (var i = 0; i < 1000; i++)
  dd[0] = 2 / dd[1];
})();
It keeps falling into runtime call and patching.

No regression test, because I don't how to test it.

Review URL: https://chromiumcodereview.appspot.com/10834064
Patch from Zheng Liu <shdwthr@gmail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12226 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent 16f9ce7c
...@@ -1080,8 +1080,8 @@ void BinaryOpStub::GenerateSmiCode( ...@@ -1080,8 +1080,8 @@ void BinaryOpStub::GenerateSmiCode(
SmiCodeGenerateHeapNumberResults allow_heapnumber_results) { SmiCodeGenerateHeapNumberResults allow_heapnumber_results) {
// Arguments to BinaryOpStub are in rdx and rax. // Arguments to BinaryOpStub are in rdx and rax.
Register left = rdx; const Register left = rdx;
Register right = rax; const Register right = rax;
// We only generate heapnumber answers for overflowing calculations // We only generate heapnumber answers for overflowing calculations
// for the four basic arithmetic operations and logical right shift by 0. // for the four basic arithmetic operations and logical right shift by 0.
...@@ -1123,20 +1123,16 @@ void BinaryOpStub::GenerateSmiCode( ...@@ -1123,20 +1123,16 @@ void BinaryOpStub::GenerateSmiCode(
case Token::DIV: case Token::DIV:
// SmiDiv will not accept left in rdx or right in rax. // SmiDiv will not accept left in rdx or right in rax.
left = rcx;
right = rbx;
__ movq(rbx, rax); __ movq(rbx, rax);
__ movq(rcx, rdx); __ movq(rcx, rdx);
__ SmiDiv(rax, left, right, &use_fp_on_smis); __ SmiDiv(rax, rcx, rbx, &use_fp_on_smis);
break; break;
case Token::MOD: case Token::MOD:
// SmiMod will not accept left in rdx or right in rax. // SmiMod will not accept left in rdx or right in rax.
left = rcx;
right = rbx;
__ movq(rbx, rax); __ movq(rbx, rax);
__ movq(rcx, rdx); __ movq(rcx, rdx);
__ SmiMod(rax, left, right, &use_fp_on_smis); __ SmiMod(rax, rcx, rbx, &use_fp_on_smis);
break; break;
case Token::BIT_OR: { case Token::BIT_OR: {
......
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