Commit b7efdc05 authored by Milad Fa's avatar Milad Fa Committed by V8 LUCI CQ

PPC/s390: [ptr-compr][turbofan] Make compressions no-ops

Port 1821aff2

Original Commit Message:

    Since we can just use the lower bits, we can make the compressions no-ops.
    As a note, they still change the representation so that the machine graph
    verifier is happy.

    X64's version of: https://chromium-review.googlesource.com/c/v8/v8/+/1751722

R=solanes@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com
BUG=
LOG=N

Change-Id: I414fa30a17e5af4fa5b3e84b1b321d890431f27e
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3100587Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#76349}
parent f5634b56
...@@ -138,9 +138,6 @@ namespace compiler { ...@@ -138,9 +138,6 @@ namespace compiler {
V(PPC_StoreSimd128) \ V(PPC_StoreSimd128) \
V(PPC_ByteRev32) \ V(PPC_ByteRev32) \
V(PPC_ByteRev64) \ V(PPC_ByteRev64) \
V(PPC_CompressSigned) \
V(PPC_CompressPointer) \
V(PPC_CompressAny) \
V(PPC_AtomicExchangeUint8) \ V(PPC_AtomicExchangeUint8) \
V(PPC_AtomicExchangeUint16) \ V(PPC_AtomicExchangeUint16) \
V(PPC_AtomicExchangeWord32) \ V(PPC_AtomicExchangeWord32) \
......
...@@ -112,9 +112,6 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -112,9 +112,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kPPC_BitcastDoubleToInt64: case kPPC_BitcastDoubleToInt64:
case kPPC_ByteRev32: case kPPC_ByteRev32:
case kPPC_ByteRev64: case kPPC_ByteRev64:
case kPPC_CompressSigned:
case kPPC_CompressPointer:
case kPPC_CompressAny:
case kPPC_F64x2Splat: case kPPC_F64x2Splat:
case kPPC_F64x2ExtractLane: case kPPC_F64x2ExtractLane:
case kPPC_F64x2ReplaceLane: case kPPC_F64x2ReplaceLane:
......
...@@ -161,9 +161,6 @@ namespace compiler { ...@@ -161,9 +161,6 @@ namespace compiler {
V(S390_StoreReverseSimd128) \ V(S390_StoreReverseSimd128) \
V(S390_StoreFloat32) \ V(S390_StoreFloat32) \
V(S390_StoreDouble) \ V(S390_StoreDouble) \
V(S390_CompressSigned) \
V(S390_CompressPointer) \
V(S390_CompressAny) \
V(S390_Word64AtomicExchangeUint64) \ V(S390_Word64AtomicExchangeUint64) \
V(S390_Word64AtomicCompareExchangeUint64) \ V(S390_Word64AtomicCompareExchangeUint64) \
V(S390_Word64AtomicAddUint64) \ V(S390_Word64AtomicAddUint64) \
......
...@@ -135,9 +135,6 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -135,9 +135,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_LoadAndTestWord64: case kS390_LoadAndTestWord64:
case kS390_LoadAndTestFloat32: case kS390_LoadAndTestFloat32:
case kS390_LoadAndTestFloat64: case kS390_LoadAndTestFloat64:
case kS390_CompressSigned:
case kS390_CompressPointer:
case kS390_CompressAny:
case kS390_F64x2Splat: case kS390_F64x2Splat:
case kS390_F64x2ReplaceLane: case kS390_F64x2ReplaceLane:
case kS390_F64x2Abs: case kS390_F64x2Abs:
......
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