Commit b2b2799d authored by plind44@gmail.com's avatar plind44@gmail.com

MIPS: Tweaked FlooringDiv back to TruncatingDiv again.

Port r20048 (8953785)

Original commit message:
This is a first step towards getting the flooring division by a
constant working again (which will be a separate CL).

BUG=
R=plind44@gmail.com

Review URL: https://codereview.chromium.org/203443009

Patch from Balazs Kilvady <kilvadyb@homejinni.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20082 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent f09f99fd
......@@ -1111,9 +1111,7 @@ void LCodeGen::DoModByConstI(LModByConstI* instr) {
return;
}
__ FlooringDiv(result, dividend, Abs(divisor));
__ srl(at, dividend, 31);
__ Addu(result, result, at);
__ TruncatingDiv(result, dividend, Abs(divisor));
__ Mul(result, result, Operand(Abs(divisor)));
__ Subu(result, dividend, Operand(result));
......@@ -1230,9 +1228,7 @@ void LCodeGen::DoDivByConstI(LDivByConstI* instr) {
DeoptimizeIf(eq, instr->environment(), dividend, Operand(zero_reg));
}
__ FlooringDiv(result, dividend, Abs(divisor));
__ srl(at, dividend, 31);
__ Addu(result, result, Operand(at));
__ TruncatingDiv(result, dividend, Abs(divisor));
if (divisor < 0) __ Subu(result, zero_reg, result);
if (!hdiv->CheckFlag(HInstruction::kAllUsesTruncatingToInt32)) {
......@@ -1371,7 +1367,8 @@ void LCodeGen::DoFlooringDivByConstI(LFlooringDivByConstI* instr) {
DeoptimizeIf(eq, instr->environment(), dividend, Operand(zero_reg));
}
__ FlooringDiv(result, dividend, divisor);
// TODO(svenpanne) Add correction terms.
__ TruncatingDiv(result, dividend, divisor);
}
......
......@@ -5723,9 +5723,9 @@ void CodePatcher::ChangeBranchCondition(Condition cond) {
}
void MacroAssembler::FlooringDiv(Register result,
Register dividend,
int32_t divisor) {
void MacroAssembler::TruncatingDiv(Register result,
Register dividend,
int32_t divisor) {
ASSERT(!dividend.is(result));
ASSERT(!dividend.is(at));
ASSERT(!result.is(at));
......@@ -5739,9 +5739,9 @@ void MacroAssembler::FlooringDiv(Register result,
if (divisor < 0 && ms.multiplier() > 0) {
Subu(result, result, Operand(dividend));
}
if (ms.shift() > 0) {
sra(result, result, ms.shift());
}
if (ms.shift() > 0) sra(result, result, ms.shift());
srl(at, dividend, 31);
Addu(result, result, Operand(at));
}
......
......@@ -1304,9 +1304,9 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
return code_object_;
}
// Emit code for a flooring division by a constant. The dividend register is
// Emit code for a truncating division by a constant. The dividend register is
// unchanged and at gets clobbered. Dividend and result must be different.
void FlooringDiv(Register result, Register dividend, int32_t divisor);
void TruncatingDiv(Register result, Register dividend, int32_t divisor);
// -------------------------------------------------------------------------
// StatsCounter support.
......
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