[riscv64] Fix temp register error that using unallocated register

Bug: v8:12576

Change-Id: I4d63f85d6528f2ad5e6502fffbc5fc7d797818ed
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3412562Reviewed-by: ji qiu <qiuji@iscas.ac.cn>
Commit-Queue: ji qiu <qiuji@iscas.ac.cn>
Auto-Submit: Yahan Lu <yahan@iscas.ac.cn>
Commit-Queue: Yahan Lu <yahan@iscas.ac.cn>
Cr-Commit-Position: refs/heads/main@{#78752}

src/codegen/riscv64/register-riscv64.h

@@ -379,8 +379,8 @@ constexpr Register kWasmInstanceRegister = a0;
 constexpr Register kWasmCompileLazyFuncIndexRegister = t0;
 
 constexpr DoubleRegister kFPReturnRegister0 = fa0;
-constexpr VRegister kSimd128ScratchReg = v26;
-constexpr VRegister kSimd128ScratchReg2 = v27;
+constexpr VRegister kSimd128ScratchReg = v23;
+constexpr VRegister kSimd128ScratchReg2 = v24;
 constexpr VRegister kSimd128ScratchReg3 = v8;
 constexpr VRegister kSimd128RegZero = v25;
 

src/compiler/backend/riscv64/instruction-selector-riscv64.cc

@@ -3072,9 +3072,9 @@ VISIT_SIMD_QFMOP(F32x4Qfms, kRiscvF32x4Qfms)
 
 void InstructionSelector::VisitI32x4DotI16x8S(Node* node) {
   RiscvOperandGenerator g(this);
-  InstructionOperand temp = g.TempFpRegister(v14);
-  InstructionOperand temp1 = g.TempFpRegister(v10);
-  InstructionOperand temp2 = g.TempFpRegister(v18);
+  InstructionOperand temp = g.TempFpRegister(v16);
+  InstructionOperand temp1 = g.TempFpRegister(v17);
+  InstructionOperand temp2 = g.TempFpRegister(v30);
   InstructionOperand dst = g.DefineAsRegister(node);
   this->Emit(kRiscvVwmul, temp, g.UseRegister(node->InputAt(0)),
              g.UseRegister(node->InputAt(1)), g.UseImmediate(E16),
@@ -3269,11 +3269,11 @@ void InstructionSelector::VisitF64x2Pmax(Node* node) {
   void InstructionSelector::Visit##OPCODE1##ExtMulHigh##OPCODE2##S(      \
       Node* node) {                                                      \
     RiscvOperandGenerator g(this);                                       \
-    InstructionOperand t1 = g.TempFpRegister(v10);                       \
+    InstructionOperand t1 = g.TempFpRegister(v16);                       \
     Emit(kRiscvVslidedown, t1, g.UseUniqueRegister(node->InputAt(0)),    \
          g.UseImmediate(kRvvVLEN / TYPE / 2), g.UseImmediate(E##TYPE),   \
          g.UseImmediate(m1));                                            \
-    InstructionOperand t2 = g.TempFpRegister(v9);                        \
+    InstructionOperand t2 = g.TempFpRegister(v17);                       \
     Emit(kRiscvVslidedown, t2, g.UseUniqueRegister(node->InputAt(1)),    \
          g.UseImmediate(kRvvVLEN / TYPE / 2), g.UseImmediate(E##TYPE),   \
          g.UseImmediate(m1));                                            \
@@ -3291,11 +3291,11 @@ void InstructionSelector::VisitF64x2Pmax(Node* node) {
   void InstructionSelector::Visit##OPCODE1##ExtMulHigh##OPCODE2##U(      \
       Node* node) {                                                      \
     RiscvOperandGenerator g(this);                                       \
-    InstructionOperand t1 = g.TempFpRegister(v10);                       \
+    InstructionOperand t1 = g.TempFpRegister(v16);                       \
     Emit(kRiscvVslidedown, t1, g.UseUniqueRegister(node->InputAt(0)),    \
          g.UseImmediate(kRvvVLEN / TYPE / 2), g.UseImmediate(E##TYPE),   \
          g.UseImmediate(m1));                                            \
-    InstructionOperand t2 = g.TempFpRegister(v9);                        \
+    InstructionOperand t2 = g.TempFpRegister(v17);                       \
     Emit(kRiscvVslidedown, t2, g.UseUniqueRegister(node->InputAt(1)),    \
          g.UseImmediate(kRvvVLEN / TYPE / 2), g.UseImmediate(E##TYPE),   \
          g.UseImmediate(m1));                                            \