MIPS64: vector-based ICs did not update type feedback counts correctly.

Port r24732 (83e975b)

BUG=v8:3605
LOG=N
R=paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/670543002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24746 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/mips64/code-stubs-mips64.cc

@@ -2947,7 +2947,18 @@ void CallICStub::Generate(MacroAssembler* masm) {
     __ Daddu(a4, a2, Operand(a4));
     __ LoadRoot(at, Heap::kmegamorphic_symbolRootIndex);
     __ sd(at, FieldMemOperand(a4, FixedArray::kHeaderSize));
-    __ Branch(&slow_start);
+    // We have to update statistics for runtime profiling.
+    const int with_types_offset =
+    FixedArray::OffsetOfElementAt(TypeFeedbackVector::kWithTypesIndex);
+    __ ld(a4, FieldMemOperand(a2, with_types_offset));
+    __ Dsubu(a4, a4, Operand(Smi::FromInt(1)));
+    __ sd(a4, FieldMemOperand(a2, with_types_offset));
+    const int generic_offset =
+    FixedArray::OffsetOfElementAt(TypeFeedbackVector::kGenericCountIndex);
+    __ ld(a4, FieldMemOperand(a2, generic_offset));
+    __ Daddu(a4, a4, Operand(Smi::FromInt(1)));
+    __ Branch(USE_DELAY_SLOT, &slow_start);
+    __ sd(a4, FieldMemOperand(a2, generic_offset));  // In delay slot.
   }
 
   // We are here because tracing is on or we are going monomorphic.

src/mips64/full-codegen-mips64.cc

@@ -1176,7 +1176,8 @@ void FullCodeGenerator::VisitForInStatement(ForInStatement* stmt) {
 
   __ li(a1, FeedbackVector());
   __ li(a2, Operand(TypeFeedbackVector::MegamorphicSentinel(isolate())));
-  __ sd(a2, FieldMemOperand(a1, FixedArray::OffsetOfElementAt(slot.ToInt())));
+  int vector_index = FeedbackVector()->GetIndex(slot);
+  __ sd(a2, FieldMemOperand(a1, FixedArray::OffsetOfElementAt(vector_index)));
 
   __ li(a1, Operand(Smi::FromInt(1)));  // Smi indicates slow check
   __ ld(a2, MemOperand(sp, 0 * kPointerSize));  // Get enumerated object

src/mips64/lithium-codegen-mips64.cc

@@ -2857,13 +2857,14 @@ void LCodeGen::DoLoadGlobalCell(LLoadGlobalCell* instr) {
 template <class T>
 void LCodeGen::EmitVectorLoadICRegisters(T* instr) {
   DCHECK(FLAG_vector_ics);
-  Register vector = ToRegister(instr->temp_vector());
-  DCHECK(vector.is(VectorLoadICDescriptor::VectorRegister()));
-  __ li(vector, instr->hydrogen()->feedback_vector());
+  Register vector_register = ToRegister(instr->temp_vector());
+  DCHECK(vector_register.is(VectorLoadICDescriptor::VectorRegister()));
+  Handle<TypeFeedbackVector> vector = instr->hydrogen()->feedback_vector();
+  __ li(vector_register, vector);
   // No need to allocate this register.
   DCHECK(VectorLoadICDescriptor::SlotRegister().is(a0));
-  __ li(VectorLoadICDescriptor::SlotRegister(),
-        Operand(Smi::FromInt(instr->hydrogen()->slot().ToInt())));
+  int index = vector->GetIndex(instr->hydrogen()->slot());
+  __ li(VectorLoadICDescriptor::SlotRegister(), Operand(Smi::FromInt(index)));
 }