[wasm-simd] Implement v8x16.swizzle for arm

Bug: v8:8460
Change-Id: I9caa817ed1ab1f64984311d90f57ed779f15b225
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1850613Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64364}

src/compiler/backend/arm/code-generator-arm.cc

@@ -2624,6 +2624,15 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               i.InputSimd128Register(1), i.InputInt4(2));
       break;
     }
+    case kArmS8x16Swizzle: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      tbl = i.InputSimd128Register(0),
+                      src = i.InputSimd128Register(1);
+      NeonListOperand table(tbl);
+      __ vtbl(dst.low(), table, src.low());
+      __ vtbl(dst.high(), table, src.high());
+      break;
+    }
     case kArmS8x16Shuffle: {
       Simd128Register dst = i.OutputSimd128Register(),
                       src0 = i.InputSimd128Register(0),

src/compiler/backend/arm/instruction-codes-arm.h

@@ -263,6 +263,7 @@ namespace compiler {
   V(ArmS8x16TransposeLeft)         \
   V(ArmS8x16TransposeRight)        \
   V(ArmS8x16Concat)                \
+  V(ArmS8x16Swizzle)               \
   V(ArmS8x16Shuffle)               \
   V(ArmS32x2Reverse)               \
   V(ArmS16x4Reverse)               \

src/compiler/backend/arm/instruction-scheduler-arm.cc

@@ -243,6 +243,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArmS8x16TransposeLeft:
     case kArmS8x16TransposeRight:
     case kArmS8x16Concat:
+    case kArmS8x16Swizzle:
     case kArmS8x16Shuffle:
     case kArmS32x2Reverse:
     case kArmS16x4Reverse:

src/compiler/backend/arm/instruction-selector-arm.cc

@@ -2712,6 +2712,14 @@ void InstructionSelector::VisitS8x16Shuffle(Node* node) {
        g.UseImmediate(Pack4Lanes(shuffle + 12)));
 }
 
+void InstructionSelector::VisitS8x16Swizzle(Node* node) {
+  ArmOperandGenerator g(this);
+  // We don't want input 0 (the table) to be the same as output, since we will
+  // modify output twice (low and high), and need to keep the table the same.
+  Emit(kArmS8x16Swizzle, g.DefineAsRegister(node),
+       g.UseUniqueRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
+}
+
 void InstructionSelector::VisitSignExtendWord8ToInt32(Node* node) {
   ArmOperandGenerator g(this);
   Emit(kArmSxtb, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),

src/compiler/backend/instruction-selector.cc

@@ -2641,7 +2641,6 @@ void InstructionSelector::VisitI64x2ReplaceLaneI32Pair(Node* node) {
 void InstructionSelector::VisitF64x2Abs(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF64x2Neg(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF64x2Sqrt(Node* node) { UNIMPLEMENTED(); }
-void InstructionSelector::VisitS8x16Swizzle(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF64x2Add(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF64x2Sub(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF64x2Mul(Node* node) { UNIMPLEMENTED(); }

test/cctest/wasm/test-run-wasm-simd.cc

@@ -2687,7 +2687,6 @@ WASM_SIMD_TEST(S8x16Concat) {
   }
 }
 
-#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM64
 struct SwizzleTestArgs {
   const Shuffle input;
   const Shuffle indices;
@@ -2741,7 +2740,6 @@ WASM_SIMD_TEST(S8x16Swizzle) {
     }
   }
 }
-#endif  // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM64
 
 // Combine 3 shuffles a, b, and c by applying both a and b and then applying c
 // to those two results.