s390: [wasm-simd] Add to simd S8x16 and I64x2 operations

Change-Id: Ia0b4da412e9bb37e2991ffc51738ff248e5c691f
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2085354Reviewed-by: Junliang Yan <jyan@ca.ibm.com>
Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#66576}

src/compiler/backend/s390/code-generator-s390.cc

@@ -3116,6 +3116,24 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
                Condition(2));
       break;
     }
+    case kS390_I64x2Add: {
+      __ va(i.OutputSimd128Register(), i.InputSimd128Register(0),
+            i.InputSimd128Register(1), Condition(0), Condition(0),
+            Condition(3));
+      break;
+    }
+    case kS390_I64x2Sub: {
+      __ vs(i.OutputSimd128Register(), i.InputSimd128Register(0),
+            i.InputSimd128Register(1), Condition(0), Condition(0),
+            Condition(3));
+      break;
+    }
+    case kS390_I64x2Mul: {
+      __ vml(i.OutputSimd128Register(), i.InputSimd128Register(0),
+             i.InputSimd128Register(1), Condition(0), Condition(0),
+             Condition(3));
+      break;
+    }
     case kS390_I32x4Add: {
       __ va(i.OutputSimd128Register(), i.InputSimd128Register(0),
             i.InputSimd128Register(1), Condition(0), Condition(0),
@@ -3456,6 +3474,18 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
     __ op(i.OutputSimd128Register(), i.InputSimd128Register(0),            \
           kScratchDoubleReg, Condition(0), Condition(0), Condition(mode)); \
   }
+    case kS390_I64x2Shl: {
+      VECTOR_SHIFT(veslv, 3);
+      break;
+    }
+    case kS390_I64x2ShrS: {
+      VECTOR_SHIFT(vesrav, 3);
+      break;
+    }
+    case kS390_I64x2ShrU: {
+      VECTOR_SHIFT(vesrlv, 3);
+      break;
+    }
     case kS390_I32x4Shl: {
       VECTOR_SHIFT(veslv, 2);
       break;
@@ -3518,6 +3548,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
                Condition(0), Condition(0), Condition(2));
       break;
     }
+    case kS390_I64x2Neg: {
+      __ vlc(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
+             Condition(0), Condition(3));
+      break;
+    }
     case kS390_I32x4Neg: {
       __ vlc(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
              Condition(0), Condition(2));
@@ -3838,6 +3873,21 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vperm(dst, src0, src1, kScratchDoubleReg, Condition(0), Condition(0));
       break;
     }
+    case kS390_S8x16Swizzle: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      src0 = i.InputSimd128Register(0),
+                      src1 = i.InputSimd128Register(1);
+      //  input needs to be reversed
+      __ vlgv(r0, src0, MemOperand(r0, 0), Condition(3));
+      __ vlgv(r1, src0, MemOperand(r0, 1), Condition(3));
+      __ lrvgr(r0, r0);
+      __ lrvgr(r1, r1);
+      __ vlvgp(kScratchDoubleReg, r1, r0);
+      // clear scr0
+      __ vx(src0, src0, src0, Condition(0), Condition(0), Condition(0));
+      __ vperm(dst, kScratchDoubleReg, src0, src1, Condition(0), Condition(0));
+      break;
+    }
     default:
       UNREACHABLE();
   }

src/compiler/backend/s390/instruction-codes-s390.h

@@ -234,6 +234,13 @@ namespace compiler {
   V(S390_F32x4Div)                          \
   V(S390_F32x4Min)                          \
   V(S390_F32x4Max)                          \
+  V(S390_I64x2Neg)                          \
+  V(S390_I64x2Add)                          \
+  V(S390_I64x2Sub)                          \
+  V(S390_I64x2Shl)                          \
+  V(S390_I64x2ShrS)                         \
+  V(S390_I64x2ShrU)                         \
+  V(S390_I64x2Mul)                          \
   V(S390_I32x4Splat)                        \
   V(S390_I32x4ExtractLane)                  \
   V(S390_I32x4ReplaceLane)                  \
@@ -321,6 +328,7 @@ namespace compiler {
   V(S390_I8x16AddSaturateU)                 \
   V(S390_I8x16SubSaturateU)                 \
   V(S390_S8x16Shuffle)                      \
+  V(S390_S8x16Swizzle)                      \
   V(S390_S1x4AnyTrue)                       \
   V(S390_S1x8AnyTrue)                       \
   V(S390_S1x16AnyTrue)                      \

src/compiler/backend/s390/instruction-scheduler-s390.cc

@@ -180,6 +180,13 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kS390_F32x4Div:
     case kS390_F32x4Min:
     case kS390_F32x4Max:
+    case kS390_I64x2Neg:
+    case kS390_I64x2Add:
+    case kS390_I64x2Sub:
+    case kS390_I64x2Shl:
+    case kS390_I64x2ShrS:
+    case kS390_I64x2ShrU:
+    case kS390_I64x2Mul:
     case kS390_I32x4Splat:
     case kS390_I32x4ExtractLane:
     case kS390_I32x4ReplaceLane:
@@ -267,6 +274,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kS390_I8x16AddSaturateU:
     case kS390_I8x16SubSaturateU:
     case kS390_S8x16Shuffle:
+    case kS390_S8x16Swizzle:
     case kS390_S1x4AnyTrue:
     case kS390_S1x8AnyTrue:
     case kS390_S1x16AnyTrue:

src/compiler/backend/s390/instruction-selector-s390.cc

@@ -2547,6 +2547,9 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
   V(F32x4Div)              \
   V(F32x4Min)              \
   V(F32x4Max)              \
+  V(I64x2Add)              \
+  V(I64x2Sub)              \
+  V(I64x2Mul)              \
   V(I32x4Add)              \
   V(I32x4AddHoriz)         \
   V(I32x4Sub)              \
@@ -2613,6 +2616,7 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
   V(F32x4RecipApprox)       \
   V(F32x4RecipSqrtApprox)   \
   V(F32x4Sqrt)              \
+  V(I64x2Neg)               \
   V(I32x4Neg)               \
   V(I32x4SConvertI16x8Low)  \
   V(I32x4SConvertI16x8High) \
@@ -2627,6 +2631,9 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
   V(S128Not)
 
 #define SIMD_SHIFT_LIST(V) \
+  V(I64x2Shl)              \
+  V(I64x2ShrS)             \
+  V(I64x2ShrU)             \
   V(I32x4Shl)              \
   V(I32x4ShrS)             \
   V(I32x4ShrU)             \
@@ -2772,6 +2779,12 @@ void InstructionSelector::VisitS8x16Shuffle(Node* node) {
        g.UseImmediate(Pack4Lanes(shuffle_remapped)));
 }
 
+void InstructionSelector::VisitS8x16Swizzle(Node* node) {
+  S390OperandGenerator g(this);
+  Emit(kS390_S8x16Swizzle, g.DefineAsRegister(node),
+       g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
+}
+
 void InstructionSelector::VisitS128Zero(Node* node) {
   S390OperandGenerator g(this);
   Emit(kS390_S128Zero, g.DefineAsRegister(node), g.DefineAsRegister(node));
@@ -2817,22 +2830,6 @@ void InstructionSelector::EmitPrepareResults(
   }
 }
 
-void InstructionSelector::VisitS8x16Swizzle(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitI64x2Neg(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitI64x2Add(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitI64x2Sub(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitI64x2Shl(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitI64x2ShrS(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitI64x2ShrU(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitI64x2Mul(Node* node) { UNIMPLEMENTED(); }
-
 void InstructionSelector::VisitLoadTransform(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitI8x16Abs(Node* node) { UNIMPLEMENTED(); }