Commit 9820f02d authored by Milad Fa's avatar Milad Fa Committed by Commit Bot

PPC: [wasm-simd] Implement S128Const and S128AllOnes

Change-Id: I8f8b0b525541cec1a814b7df6ffe0baf00514929
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2554526Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#71344}
parent c48ae2d9
...@@ -2892,11 +2892,28 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -2892,11 +2892,28 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ vxor(dst, i.InputSimd128Register(0), src); __ vxor(dst, i.InputSimd128Register(0), src);
break; break;
} }
case kPPC_S128Const: {
Simd128Register dst = i.OutputSimd128Register();
constexpr int lane_width_in_bytes = 8;
uint64_t low = make_uint64(i.InputUint32(1), i.InputUint32(0));
uint64_t high = make_uint64(i.InputUint32(3), i.InputUint32(2));
__ mov(r0, Operand(low));
__ mov(ip, Operand(high));
__ mtvsrd(dst, ip);
__ mtvsrd(kScratchDoubleReg, r0);
__ vinsertd(dst, kScratchDoubleReg, Operand(1 * lane_width_in_bytes));
break;
}
case kPPC_S128Zero: { case kPPC_S128Zero: {
Simd128Register dst = i.OutputSimd128Register(); Simd128Register dst = i.OutputSimd128Register();
__ vxor(dst, dst, dst); __ vxor(dst, dst, dst);
break; break;
} }
case kPPC_S128AllOnes: {
Simd128Register dst = i.OutputSimd128Register();
__ vcmpequb(dst, dst, dst);
break;
}
case kPPC_S128Not: { case kPPC_S128Not: {
Simd128Register dst = i.OutputSimd128Register(); Simd128Register dst = i.OutputSimd128Register();
Simd128Register src = i.InputSimd128Register(0); Simd128Register src = i.InputSimd128Register(0);
......
...@@ -373,7 +373,9 @@ namespace compiler { ...@@ -373,7 +373,9 @@ namespace compiler {
V(PPC_S128And) \ V(PPC_S128And) \
V(PPC_S128Or) \ V(PPC_S128Or) \
V(PPC_S128Xor) \ V(PPC_S128Xor) \
V(PPC_S128Const) \
V(PPC_S128Zero) \ V(PPC_S128Zero) \
V(PPC_S128AllOnes) \
V(PPC_S128Not) \ V(PPC_S128Not) \
V(PPC_S128Select) \ V(PPC_S128Select) \
V(PPC_S128AndNot) \ V(PPC_S128AndNot) \
......
...@@ -296,7 +296,9 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -296,7 +296,9 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kPPC_S128And: case kPPC_S128And:
case kPPC_S128Or: case kPPC_S128Or:
case kPPC_S128Xor: case kPPC_S128Xor:
case kPPC_S128Const:
case kPPC_S128Zero: case kPPC_S128Zero:
case kPPC_S128AllOnes:
case kPPC_S128Not: case kPPC_S128Not:
case kPPC_S128Select: case kPPC_S128Select:
case kPPC_S128AndNot: case kPPC_S128AndNot:
......
...@@ -2439,7 +2439,24 @@ void InstructionSelector::VisitS128Select(Node* node) { ...@@ -2439,7 +2439,24 @@ void InstructionSelector::VisitS128Select(Node* node) {
g.UseRegister(node->InputAt(2))); g.UseRegister(node->InputAt(2)));
} }
void InstructionSelector::VisitS128Const(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitS128Const(Node* node) {
PPCOperandGenerator g(this);
uint32_t val[kSimd128Size / sizeof(uint32_t)];
base::Memcpy(val, S128ImmediateParameterOf(node->op()).data(), kSimd128Size);
// If all bytes are zeros, avoid emitting code for generic constants.
bool all_zeros = !(val[0] || val[1] || val[2] || val[3]);
bool all_ones = val[0] == UINT32_MAX && val[1] == UINT32_MAX &&
val[2] == UINT32_MAX && val[3] == UINT32_MAX;
InstructionOperand dst = g.DefineAsRegister(node);
if (all_zeros) {
Emit(kPPC_S128Zero, dst);
} else if (all_ones) {
Emit(kPPC_S128AllOnes, dst);
} else {
Emit(kPPC_S128Const, dst, g.UseImmediate(val[0]), g.UseImmediate(val[1]),
g.UseImmediate(val[2]), g.UseImmediate(val[3]));
}
}
void InstructionSelector::EmitPrepareResults( void InstructionSelector::EmitPrepareResults(
ZoneVector<PushParameter>* results, const CallDescriptor* call_descriptor, ZoneVector<PushParameter>* results, const CallDescriptor* call_descriptor,
......
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