Commit 95efd8c1 authored by Junliang Yan's avatar Junliang Yan Committed by Commit Bot

s390x: Add LER and LEZR simulator implementation

Change-Id: I771d3db6510146b043c9dd0a3bae8a9a67b21176
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2552927Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
Commit-Queue: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/master@{#71323}
parent 920bc23f
......@@ -4959,9 +4959,11 @@ EVALUATE(CDR) {
}
EVALUATE(LER) {
UNIMPLEMENTED();
USE(instr);
return 0;
DCHECK_OPCODE(LER);
DECODE_RR_INSTRUCTION(r1, r2);
int64_t r2_val = get_f_register(r2);
set_d_register(r1, r2_val);
return length;
}
EVALUATE(STH) {
......@@ -7288,9 +7290,10 @@ EVALUATE(LCDFR) {
}
EVALUATE(LZER) {
UNIMPLEMENTED();
USE(instr);
return 0;
DCHECK_OPCODE(LZER);
DECODE_RRE_INSTRUCTION_NO_R2(r1);
set_d_register_from_float32(r1, 0.0);
return length;
}
EVALUATE(LZDR) {
......
......@@ -157,6 +157,13 @@ class Simulator : public SimulatorBase {
return get_simd_register_by_lane<int64_t>(dreg, 0);
}
int64_t get_f_register(int dreg) {
DCHECK(dreg >= 0 && dreg < kNumFPRs);
int64_t d_val = get_simd_register_by_lane<int64_t>(dreg, 0);
int64_t f_val = d_val >> 32;
return f_val << 32;
}
void set_d_register_from_float32(int dreg, const float f) {
DCHECK(dreg >= 0 && dreg < kNumFPRs);
......
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