Commit 7ea34a90 authored by Joran Siu's avatar Joran Siu Committed by Commit Bot

s390: Fix LOCR/LOCGR disassembly

z/Architecture Principles of Operation details LOCR/LOCGR to be RRF-c
format, with the operands printed in the form LOCR/LOCGR R1,R2,M3,
where M3 is binary encoded in bits 16-20.  Current disassembler
is printing the operands in the wrong order, and extracting the Mask
from the wrong bits.

R=jyan@ca.ibm.com, michael_dawson@ca.ibm.com

Change-Id: I30baaab16ab3dbf879df381cd1f0978a66a214a6
Reviewed-on: https://chromium-review.googlesource.com/1091139Reviewed-by: 's avatarJunliang Yan <jyan@ca.ibm.com>
Commit-Queue: Joran Siu <joransiu@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#53593}
parent ca489d39
...@@ -848,10 +848,10 @@ bool Decoder::DecodeFourByte(Instruction* instr) { ...@@ -848,10 +848,10 @@ bool Decoder::DecodeFourByte(Instruction* instr) {
Format(instr, "llghr\t'r5,'r6"); Format(instr, "llghr\t'r5,'r6");
break; break;
case LOCR: case LOCR:
Format(instr, "locr\t'm1,'r5,'r6"); Format(instr, "locr\t'r5,'r6,'m2");
break; break;
case LOCGR: case LOCGR:
Format(instr, "locgr\t'm1,'r5,'r6"); Format(instr, "locgr\t'r5,'r6,'m2");
break; break;
case LNGR: case LNGR:
Format(instr, "lngr\t'r5,'r6"); Format(instr, "lngr\t'r5,'r6");
......
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