ppc: rename StoreU32/U16/U8

Change-Id: Id90dbf6dca8c3c06221922b6f65b2d72f5ac981a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2920747
Commit-Queue: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Auto-Submit: Junliang Yan <junyan@redhat.com>
Reviewed-by: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#74798}

src/builtins/ppc/builtins-ppc.cc

@@ -1100,7 +1100,7 @@ void Builtins::Generate_InterpreterEntryTrampoline(MacroAssembler* masm) {
       FieldMemOperand(feedback_vector, FeedbackVector::kInvocationCountOffset),
       r0);
   __ addi(r8, r8, Operand(1));
-  __ StoreWord(
+  __ StoreU32(
       r8,
       FieldMemOperand(feedback_vector, FeedbackVector::kInvocationCountOffset),
       r0);
@@ -1121,10 +1121,10 @@ void Builtins::Generate_InterpreterEntryTrampoline(MacroAssembler* masm) {
                 BytecodeArray::kOsrNestingLevelOffset + kCharSize);
   STATIC_ASSERT(BytecodeArray::kNoAgeBytecodeAge == 0);
   __ li(r8, Operand(0));
-  __ StoreHalfWord(r8,
-                   FieldMemOperand(kInterpreterBytecodeArrayRegister,
-                                   BytecodeArray::kOsrNestingLevelOffset),
-                   r0);
+  __ StoreU16(r8,
+              FieldMemOperand(kInterpreterBytecodeArrayRegister,
+                              BytecodeArray::kOsrNestingLevelOffset),
+              r0);
 
   // Load initial bytecode offset.
   __ mov(kInterpreterBytecodeOffsetRegister,

src/codegen/ppc/macro-assembler-ppc.cc

@@ -534,7 +534,7 @@ void TurboAssembler::StoreTaggedField(const Register& value,
                                       const Register& scratch) {
   if (COMPRESS_POINTERS_BOOL) {
     RecordComment("[ StoreTagged");
-    StoreWord(value, dst_field_operand, scratch);
+    StoreU32(value, dst_field_operand, scratch);
     RecordComment("]");
   } else {
     StoreU64(value, dst_field_operand, scratch);
@@ -2847,8 +2847,8 @@ void TurboAssembler::LoadU32(Register dst, const MemOperand& mem,
 
 // Variable length depending on whether offset fits into immediate field
 // MemOperand current only supports d-form
-void TurboAssembler::StoreWord(Register src, const MemOperand& mem,
-                               Register scratch) {
+void TurboAssembler::StoreU32(Register src, const MemOperand& mem,
+                              Register scratch) {
   Register base = mem.ra();
   int offset = mem.offset();
 
@@ -2891,8 +2891,8 @@ void TurboAssembler::LoadU16(Register dst, const MemOperand& mem,
 
 // Variable length depending on whether offset fits into immediate field
 // MemOperand current only supports d-form
-void MacroAssembler::StoreHalfWord(Register src, const MemOperand& mem,
-                                   Register scratch) {
+void TurboAssembler::StoreU16(Register src, const MemOperand& mem,
+                              Register scratch) {
   Register base = mem.ra();
   int offset = mem.offset();
 
@@ -2921,8 +2921,8 @@ void TurboAssembler::LoadU8(Register dst, const MemOperand& mem,
 
 // Variable length depending on whether offset fits into immediate field
 // MemOperand current only supports d-form
-void MacroAssembler::StoreByte(Register src, const MemOperand& mem,
-                               Register scratch) {
+void TurboAssembler::StoreU8(Register src, const MemOperand& mem,
+                             Register scratch) {
   Register base = mem.ra();
   int offset = mem.offset();
 

src/codegen/ppc/macro-assembler-ppc.h

@@ -38,7 +38,6 @@ Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
 
 // These exist to provide portability between 32 and 64bit
 #if V8_TARGET_ARCH_PPC64
-#define StorePUX stdux
 #define ShiftLeftImm sldi
 #define ShiftRightImm srdi
 #define ClearLeftImm clrldi
@@ -48,7 +47,6 @@ Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
 #define ShiftRight_ srd
 #define ShiftRightArith srad
 #else
-#define StorePUX stwux
 #define ShiftLeftImm slwi
 #define ShiftRightImm srwi
 #define ClearLeftImm clrlwi
@@ -140,14 +138,6 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
     mov(kRootRegister, Operand(isolate_root));
   }
 
-  void LoadU64(Register dst, const MemOperand& mem, Register scratch = no_reg);
-  void LoadU64WithUpdate(Register dst, const MemOperand& mem,
-                         Register scratch = no_reg);
-  void LoadS32(Register dst, const MemOperand& mem, Register scratch = no_reg);
-  void StoreU64(Register src, const MemOperand& mem, Register scratch = no_reg);
-  void StoreU64WithUpdate(Register src, const MemOperand& mem,
-                          Register scratch = no_reg);
-
   void LoadDouble(DoubleRegister dst, const MemOperand& mem,
                   Register scratch = no_reg);
   void LoadFloat32(DoubleRegister dst, const MemOperand& mem,
@@ -705,11 +695,22 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   void DecompressAnyTagged(Register destination, MemOperand field_operand);
   void DecompressAnyTagged(Register destination, Register source);
 
-  void LoadU32(Register dst, const MemOperand& mem, Register scratch);
+  void LoadU64WithUpdate(Register dst, const MemOperand& mem,
+                         Register scratch = no_reg);
+  void StoreU64WithUpdate(Register src, const MemOperand& mem,
+                          Register scratch = no_reg);
+
+  void LoadU64(Register dst, const MemOperand& mem, Register scratch = no_reg);
+  void LoadU32(Register dst, const MemOperand& mem, Register scratch = no_reg);
+  void LoadS32(Register dst, const MemOperand& mem, Register scratch = no_reg);
   void LoadU16(Register dst, const MemOperand& mem, Register scratch = no_reg);
   void LoadS16(Register dst, const MemOperand& mem, Register scratch = no_reg);
-  void LoadU8(Register dst, const MemOperand& mem, Register scratch);
-  void StoreWord(Register src, const MemOperand& mem, Register scratch);
+  void LoadU8(Register dst, const MemOperand& mem, Register scratch = no_reg);
+
+  void StoreU64(Register src, const MemOperand& mem, Register scratch = no_reg);
+  void StoreU32(Register src, const MemOperand& mem, Register scratch);
+  void StoreU16(Register src, const MemOperand& mem, Register scratch);
+  void StoreU8(Register src, const MemOperand& mem, Register scratch);
 
  private:
   static const int kSmiShift = kSmiTagSize + kSmiShiftSize;
@@ -786,10 +787,6 @@ class V8_EXPORT_PRIVATE MacroAssembler : public TurboAssembler {
 
   // load a literal double value <value> to FPR <result>
 
-  void StoreHalfWord(Register src, const MemOperand& mem, Register scratch);
-
-  void StoreByte(Register src, const MemOperand& mem, Register scratch);
-
   void LoadDoubleU(DoubleRegister dst, const MemOperand& mem,
                    Register scratch = no_reg);