Commit 6a9c8553 authored by Deepti Gandluri's avatar Deepti Gandluri Committed by V8 LUCI CQ

[wasm-relaxed-simd] Enable relaxed swizzle tests on all platforms

Bug: v8:12284
Change-Id: I7f6a4a5182ad61dfdc13faf2ced99fba7d64c9c5
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3640926Reviewed-by: 's avatarThibaud Michaud <thibaudm@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/main@{#80502}
parent 2eaf6205
......@@ -381,11 +381,7 @@ WASM_RELAXED_SIMD_TEST(I32x4RelaxedTruncF32x4U) {
IntRelaxedTruncFloatTest<uint32_t, float>(
execution_tier, kExprI32x4RelaxedTruncF32x4U, kExprF32x4Splat);
}
#endif // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM64 ||
// V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_RISCV64
#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM64 || \
V8_TARGET_ARCH_RISCV64
WASM_RELAXED_SIMD_TEST(I8x16RelaxedSwizzle) {
// Output is only defined for indices in the range [0,15].
WasmRunner<int32_t> r(execution_tier);
......@@ -408,7 +404,7 @@ WASM_RELAXED_SIMD_TEST(I8x16RelaxedSwizzle) {
}
}
#endif // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM64 ||
// V8_TARGET_ARCH_RISCV64
// V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_RISCV64
#if V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_ARM
WASM_RELAXED_SIMD_TEST(I16x8RelaxedQ15MulRS) {
......
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