Commit 6a358500 authored by Milad Fa's avatar Milad Fa Committed by Commit Bot

S390: fix DCHECK in store f32 and f64

Change-Id: Ie7fbaebda580787a6261f0bc56fc1bde370148e4
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2698928Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#72828}
parent 87860cc4
...@@ -3782,14 +3782,14 @@ void TurboAssembler::StoreU16LE(Register src, const MemOperand& mem, ...@@ -3782,14 +3782,14 @@ void TurboAssembler::StoreU16LE(Register src, const MemOperand& mem,
void TurboAssembler::StoreF64LE(DoubleRegister src, const MemOperand& opnd, void TurboAssembler::StoreF64LE(DoubleRegister src, const MemOperand& opnd,
Register scratch) { Register scratch) {
DCHECK(!is_int20(opnd.offset())); DCHECK(is_uint12(opnd.offset()));
lgdr(scratch, src); lgdr(scratch, src);
strvg(scratch, opnd); strvg(scratch, opnd);
} }
void TurboAssembler::StoreF32LE(DoubleRegister src, const MemOperand& opnd, void TurboAssembler::StoreF32LE(DoubleRegister src, const MemOperand& opnd,
Register scratch) { Register scratch) {
DCHECK(!is_int20(opnd.offset())); DCHECK(is_uint12(opnd.offset()));
lgdr(scratch, src); lgdr(scratch, src);
ShiftRightU64(scratch, scratch, Operand(32)); ShiftRightU64(scratch, scratch, Operand(32));
strv(scratch, opnd); strv(scratch, opnd);
......
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