[instruction-scheduler][mips] Implement instruction-scheduler for mips64

Also, fix latency for NEG_S and NEG_D on mips.

Change-Id: I74626a787c67f79d430e55e715446d21b39ef937
Reviewed-on: https://chromium-review.googlesource.com/1088611Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@mips.com>
Commit-Queue: Sreten Kovacevic <sreten.kovacevic@mips.com>
Cr-Commit-Position: refs/heads/master@{#53550}

src/compiler/mips/instruction-scheduler-mips.cc

@@ -1071,7 +1071,7 @@ int CompareIsNanF32Latency() { return CompareIsNanFLatency(); }
 
 int Neg_sLatency() {
   if (IsMipsArchVariant(kMips32r6)) {
-    return 1;
+    return Latency::NEG_S;
   } else {
     // Estimated.
     return CompareIsNanF32Latency() + 2 * Latency::BRANCH + Latency::NEG_S +
@@ -1083,7 +1083,7 @@ int CompareIsNanF64Latency() { return CompareIsNanFLatency(); }
 
 int Neg_dLatency() {
   if (IsMipsArchVariant(kMips32r6)) {
-    return 1;
+    return Latency::NEG_D;
   } else {
     // Estimated.
     return CompareIsNanF64Latency() + 2 * Latency::BRANCH + Latency::NEG_D +